system-on-chip
Here are 74 public repositories matching this topic...
OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.
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May 28, 2024 - Python
🖥️ A tiny, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
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Jun 6, 2024 - C
Embedded Scalable Platforms: Heterogeneous SoC architecture and IP integration made easy
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Jun 6, 2024 - C
Gain an introductory knowledge to the basics of SoC design and key skills required to implement a simple SoC on an FPGA, and write embedded programs targeted at the microprocessor to control the peripherals
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Nov 24, 2023 - HTML
💻 A damn small msp430-compatible customizable soft-core microcontroller-like processor system written in platform-independent VHDL.
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Nov 23, 2021 - VHDL
Basic RISC-V Test SoC
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Apr 7, 2019 - Verilog
System on Chip toolkit for Amaranth HDL
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May 28, 2024 - Python
Development platform for the Espressif ESP32 WiFi/Microcontroller SoC
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Mar 18, 2023
A curated collection of technical documentation for Arcades, Handhelds, Consoles, Computers and MCU’s.
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Mar 5, 2021
A Modeling and Verification Platform for SoCs using ILAs
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Apr 22, 2022 - C++
QNICE-FPGA is a 16-bit computer system for recreational programming built as a fully-fledged System-on-a-Chip in portable VHDL.
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Apr 30, 2024 - Assembly
Small Processing Unit 32: A compact RV32I CPU written in Verilog
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May 30, 2022 - C
VSDBabySoC is a small mixed-signal SoC including PLL, DAC, and a RISCV-based processor named RVMYTH.
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Jan 4, 2022 - Verilog
The Antikernel operating system project
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Apr 23, 2020 - Verilog
TransferCL: an open framework for transfer learning on mobile device
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Jul 18, 2018 - C
A bare bones, basic, ZipCPU system designed for both testing and quick integration into new systems
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Oct 27, 2022 - Verilog
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