Implemented an ultrasonic sensor to measure and visualize distances on the FPGA 7-seg Display and LEDs.
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Dec 5, 2019 - VHDL
Implemented an ultrasonic sensor to measure and visualize distances on the FPGA 7-seg Display and LEDs.
Game of Balance is an accelerometer based maze navigation game, with added features of score and life, that is built on Nexys 4 DDR development board.
An audio project with the NEXYS 4 ddr
My experiments with Nexys4 DDR Artix-7 FPGA Board
Xilinx Vivado demo project with design, IP, SDK interaction, VGA, finite state machine and outputs
FPGA based SD card reads and displays pictures and performs digital recognition experiments.
A finite state machine controlled calculator written using Verilog in Xilinx Vivado targeting the Nexys 4 DDR FPGA Board
A series of projects using the floating point division IP from Xilinx to perform floating point (single precision) division. Boards used: ZYBO and NEXYS4DDR (ARTIX-7)
It is my Final Degree Project of Grado de Tecnologías y Servicios de Telecomunicación in Universidad Politécnica de Madrid
VHDL game that displays incremental random sequences on an LED Matrix by creating a finite state machine and implementing RAM and ROM models.
An FPGA implementation of Cummings' Asynchronous FIFO
CECS 490A/490B Course; Senior Project Design
Using the FPGA board Nexys Artix-7 to design a breakout game with vhdl language.
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