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Pull requests: SI-RISCV/e200_opensource

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Pull requests list

Fix conditional operator in e203_exu_alu_muldiv
#47 opened Aug 26, 2020 by sylwpro Loading…
vsim/Makefile: fix build command in some case
#40 opened Jan 2, 2020 by vowstar Loading…
Define CSR Address width
#30 opened Aug 31, 2019 by howard0su Loading…
Fix typo in decoder
#29 opened Aug 31, 2019 by howard0su Loading…
Verilator testbench for ISA tests
#8 opened Aug 7, 2018 by brabect1 Loading…
ProTip! Exclude everything labeled bug with -label:bug.