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Address warning messages for low-quality 3-layer ALCTs in Phase2 WFs with 12_0_0_pre2 #34002

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merged 4 commits into from Jun 8, 2021
Merged

Address warning messages for low-quality 3-layer ALCTs in Phase2 WFs with 12_0_0_pre2 #34002

merged 4 commits into from Jun 8, 2021

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dildick
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@dildick dildick commented Jun 7, 2021

PR description:

In issue #33993 @srimanob noted warning messages coming from the LCTQualityControl in Phase-2 workflows. Those are coming from 3-layer ALCTs in ME2/1 where we could match them to GE2/1 trigger primitives.

This idea was conceived several years ago for the Phase-2 muon upgrade. By lowering the layer threshold in ME2/1 to form an ALCT from 4 to 3, we could recover ALCT inefficiency in certain parts of the ME2/1 chamber where the high voltage is lowered. In the trigger path you could eliminate the pure 3-layer ALCT from the 3-layer ALCTs that have a matching GEM hit to enhance the quality. But in the DAQ path (readout) you would likely see a large increase in data transfer in Phase-2. Those DAQ rates are not well understood. Definitely not considering the new HGCal geometry which may increase ALCT rates in ME2/1. For that reason, it is probably better to increase the threshold for ALCTs in ME2/1 back to 4 (as it was before). It will give us a more realistic picture in the simulation - rather than hopes and dreams. What can be done in the future - something that would be worth studying - is a localized reduction of the threshold from 4 to 3 layers for patterns with wiregroups where the high voltage drops.

In the mean time, it is best to keep the threshold at 4 layers (even in scenarios with GEMs). The l1 single muon efficiency will drop slightly in the region 1.6 to 2.4 in phase-2 workflows.

If someone (in their private studies) would like to change it back to 3 layers, I made an improvement in CSCUpgradeAnodeLCTProcessor ::getTempALCTQuality so that the warning messages do not appear anymore. The low quality 3-layer ALCTs in ME2/1 when the GE2/1 would be assigned a quality of 1, just like 4-layer ALCTs.

I also added more documentation on how the ghost cancellation works in the ALCT processor. This is something that will change slightly in the Run-3 emulation, i.e. more similar to the firmware than in Run-1 and Run-2.

PR validation:

In CMSSW_12_0_X_2021-06-06-2300 tested with

cmsDriver.py MinBias_14TeV_pythia8_TuneCP5_cfi --conditions auto:phase2_realistic_T21 -n 100 \
--era Phase2C11I13M9 --eventcontent FEVTDEBUG -s GEN,SIM --datatier GEN-SIM \
--beamspot HLLHC14TeV --geometry Extended2026D76 \
--python MinBias_14TeV_pythia8_TuneCP5_2026D76_GenSimHLBeamSpot14.py \
--customise SLHCUpgradeSimulations/Configuration/aging.customise_aging_1000 \
--no_exec --fileout file:minbias.root --nThreads 8 --mc

cmsDriver.py TTbar_14TeV_TuneCP5_cfi --conditions auto:phase2_realistic_T21 -n 10 \
--era Phase2C11I13M9 --eventcontent FEVTDEBUG -s GEN,SIM --datatier GEN-SIM \
--beamspot HLLHC14TeV --geometry Extended2026D76 \
--python TTbar_14TeV_TuneCP5_2026D76_GenSimHLBeamSpot14.py \
--customise SLHCUpgradeSimulations/Configuration/aging.customise_aging_1000 \
--no_exec --fileout file:ttbar.root --nThreads 8 --mc

cmsDriver.py step2 --conditions auto:phase2_realistic_T21 --pileup_input file:minbias.root -n 10 \
--era Phase2C11I13M9 --eventcontent FEVTDEBUGHLT -s DIGI:pdigi_valid,L1TrackTrigger,L1 \
--datatier GEN-SIM-DIGI --pileup AVE_200_BX_25ns --geometry Extended2026D76 \
--io DigiTriggerPU_2026D76PU.io --python DigiTriggerPU_2026D76PU.py \
--customise SLHCUpgradeSimulations/Configuration/aging.customise_aging_1000 \
--no_exec --filein file:ttbar.root --fileout file:step2.root --nThreads 8 --nStreams 1 --mc

The last step produced the output

Begin processing the 1st record. Run 1, Event 4, LumiSection 1 on stream 0 at 07-Jun-2021 14:36:25.685 CDT
#--------------------------------------------------------------------------
#                         FastJet release 3.4.0-beta.1
#                 M. Cacciari, G.P. Salam and G. Soyez                  
#     A software package for jet finding and analysis at colliders      
#                           http://fastjet.fr                           
#	                                                                      
# Please cite EPJC72(2012)1896 [arXiv:1111.6097] if you use this package
# for scientific work and optionally PLB641(2006)57 [hep-ph/0512210].   
#                                                                       
# FastJet is provided without warranty under the GNU GPL v2 or higher.  
# It uses T. Chan's closest pair algorithm, S. Fortune's Voronoi code
# and 3rd party plugin jet algorithms. See COPYING file for details.
#--------------------------------------------------------------------------
Begin processing the 2nd record. Run 1, Event 1, LumiSection 1 on stream 0 at 07-Jun-2021 14:37:57.045 CDT
Begin processing the 3rd record. Run 1, Event 7, LumiSection 1 on stream 0 at 07-Jun-2021 14:39:04.789 CDT
Begin processing the 4th record. Run 1, Event 8, LumiSection 1 on stream 0 at 07-Jun-2021 14:40:08.896 CDT
Begin processing the 5th record. Run 1, Event 2, LumiSection 1 on stream 0 at 07-Jun-2021 14:41:15.009 CDT
Begin processing the 6th record. Run 1, Event 5, LumiSection 1 on stream 0 at 07-Jun-2021 14:42:17.955 CDT
Begin processing the 7th record. Run 1, Event 3, LumiSection 1 on stream 0 at 07-Jun-2021 14:43:23.152 CDT
Begin processing the 8th record. Run 1, Event 9, LumiSection 1 on stream 0 at 07-Jun-2021 14:44:29.940 CDT
Begin processing the 9th record. Run 1, Event 6, LumiSection 1 on stream 0 at 07-Jun-2021 14:45:36.235 CDT
Begin processing the 10th record. Run 1, Event 10, LumiSection 1 on stream 0 at 07-Jun-2021 14:46:39.470 CDT
07-Jun-2021 14:47:48 CDT  Closed file file:ttbar.root
07-Jun-2021 14:47:48 CDT  Closed file file:minbias.root

if this PR is a backport please specify the original PR and why you need to backport that PR:

N/A

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cmsbuild commented Jun 7, 2021

+code-checks

Logs: https://cmssdt.cern.ch/SDT/code-checks/cms-sw-PR-34002/23124

  • This PR adds an extra 32KB to repository

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cmsbuild commented Jun 7, 2021

A new Pull Request was created by @dildick (Sven Dildick) for master.

It involves the following packages:

L1Trigger/CSCTriggerPrimitives

@cmsbuild, @rekovic, @cecilecaillol can you please review it and eventually sign? Thanks.
@valuev, @ptcox, @Martin-Grunewald this is something you requested to watch as well.
@silviodonato, @dpiparo, @qliphy you are the release manager for this.

cms-bot commands are listed here

@srimanob
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srimanob commented Jun 8, 2021

Please test

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cmsbuild commented Jun 8, 2021

+1

Summary: https://cmssdt.cern.ch/SDT/jenkins-artifacts/pull-request-integration/PR-13b145/15739/summary.html
COMMIT: 147e176
CMSSW: CMSSW_12_0_X_2021-06-07-1100/slc7_amd64_gcc900
User test area: For local testing, you can use /cvmfs/cms-ci.cern.ch/week0/cms-sw/cmssw/34002/15739/install.sh to create a dev area with all the needed externals and cmssw changes.

Comparison Summary

Summary:

  • No significant changes to the logs found
  • Reco comparison results: 7 differences found in the comparisons
  • DQMHistoTests: Total files compared: 37
  • DQMHistoTests: Total histograms compared: 2648335
  • DQMHistoTests: Total failures: 28
  • DQMHistoTests: Total nulls: 1
  • DQMHistoTests: Total successes: 2648284
  • DQMHistoTests: Total skipped: 22
  • DQMHistoTests: Total Missing objects: 0
  • DQMHistoSizes: Histogram memory added: 0.004 KiB( 36 files compared)
  • DQMHistoSizes: changed ( 312.0 ): 0.004 KiB MessageLogger/Warnings
  • Checked 155 log files, 37 edm output root files, 37 DQM output files
  • TriggerResults: no differences found

@srimanob
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srimanob commented Jun 8, 2021

Thanks @dildick for prompt fix.

By the way, do you know why we can't capture this kind of warning from PR test? I assume it is there for a while. For example, I just look in the test result of another PR from a few days ago,
https://cmssdt.cern.ch/SDT/jenkins-artifacts/pull-request-integration/PR-5ee155/15647/runTheMatrix-results/
Log in upgrade workflow does not show anything.

@cecilecaillol
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+l1

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cmsbuild commented Jun 8, 2021

This pull request is fully signed and it will be integrated in one of the next master IBs (tests are also fine). This pull request will now be reviewed by the release team before it's merged. @silviodonato, @dpiparo, @qliphy (and backports should be raised in the release meeting by the corresponding L2)

@qliphy
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qliphy commented Jun 8, 2021

+1

@cmsbuild cmsbuild merged commit 76f6a60 into cms-sw:master Jun 8, 2021
@dildick
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dildick commented Jun 8, 2021

@srimanob. Not sure why. It might be that the one you looked at just did not happen to have such a low-quality ALCT in the ALCTDigiCollection. The ALCT from the muon (or from pileup) needs to be produced in a very specific part of the ME2/1 for the warning message to have appeared.

@dildick dildick deleted the from-CMSSW_12_0_X_2021-06-06-2300-fix-error-messages-alct branch June 8, 2021 11:27
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