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temp test: disables RM ISR and ISR CHAINING.
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crazii committed Mar 1, 2024
1 parent 65bb80d commit 3076e4b
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Showing 2 changed files with 11 additions and 21 deletions.
2 changes: 1 addition & 1 deletion irqguard.c
Expand Up @@ -49,7 +49,7 @@ BOOL IRQGUARD_Install(uint8_t irq)
int vec = PIC_IRQ2VEC(irq);
CLIS();
//install handler
//need install to DPMI because PM games may install DPMI handler
//need install to DPMI because PM games may install RM handler (rm mode sound card drivers) to DPMI
//if rawIVT is used, it will prevent DPMI and PM games to process it
DPMI_InstallRealModeISR_Direct(vec, (uint16_t)(IRQGUARD_DOSMEM&0xFFFF), datasize, &IRQGUARD_Handle, FALSE);
//far ptr
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30 changes: 10 additions & 20 deletions main.c
Expand Up @@ -31,9 +31,9 @@ PROGNAME = "SBEMU";

#define MAIN_TRAP_PMPIC_ONDEMAND 0 //now we need a Virtual PIC to hide some IRQ for protected mode games (doom especially)
#define MAIN_TRAP_RMPIC_ONDEMAND 1 //don't hide IRQ for rm, as some driver(i.e.usbuhci) will use it
#define MAIN_INSTALL_RM_ISR 1 //not needed. but to workaround some rm games' problem. need RAW_HOOk in dpmi_dj2.c
#define MAIN_INSTALL_RM_ISR 0 //not needed. but to workaround some rm games' problem. need RAW_HOOk in dpmi_dj2.c - disble for more tests.
#define MAIN_DOUBLE_OPL_VOLUME 1 //hack: double the amplitude of OPL PCM. should be 1 or 0
#define MAIN_ISR_CHAINED 1 //auto calls next handler AFTER current handler exits
#define MAIN_ISR_CHAINED 0 //auto calls next handler AFTER current handler exits - cause more mode switches, disable for more tests.

#define MAIN_TSR_INT 0x2D //AMIS multiplex. TODO: 0x2F?
#define MAIN_TSR_INTSTART_ID 0x01 //start id
Expand Down Expand Up @@ -807,23 +807,6 @@ int main(int argc, char* argv[])
printf("Please try use /i5 or /i7 switch, or disable some onboard devices in the BIOS settings to release IRQs.\n");
return 1;
}
#if 0
if(aui.card_irq <= 0x07) //SBPCI/CMI use irq 5/7 to gain DOS compatility?
{
printf("WARNING: Low IRQ %d used for sound card, higher IRQ number(8~15) is recommended.\n", aui.card_irq);
//TODO: do we need to do this?
#if 0
printf("Trying to enable Level triggered mode...");
if(aui.card_irq > 2) //don't use level triggering for legacy ISA IRQ (timer/kbd etc)
{
uint16_t elcr = ((uint16_t)inp(0x4D1)<<8) | (inp(0x4D0)); //edge level control reg
elcr |= (1<<aui.card_irq);
outpw(0x4D0, elcr);
printf("done.\n");
}
#endif
}
#endif
pcibios_enable_interrupt(aui.card_pci_dev);

printf("Real mode support: ");
Expand Down Expand Up @@ -857,7 +840,6 @@ int main(int argc, char* argv[])
return 1;
}

//OPL3EMU_Init(aui.freq_card);
char *emutype = fm_aui.fm ? "hardware" : "emulation";
char hwdesc[64];
hwdesc[0] = '\0';
Expand Down Expand Up @@ -1011,6 +993,14 @@ int main(int argc, char* argv[])
}

HDPMIPT_GetIRQRoutedHandlerH(aui.card_irq, &OldRoutedHandle);
#if !MAIN_INSTALL_RM_ISR
{
DPMI_ISR_HANDLE handle;
DPMI_GetISR(aui.card_irq, &handle);
//need preset irq routing for RM since MAIN_IntHandleRM.wrapper_cs/wrapper_offset is not valid.
HDPMIPT_InstallIRQRoutedHandler(aui.card_irq, handle.old_cs, handle.old_offset, handle.old_rm_cs, handle.old_rm_offset);
}
#endif
HDPMIPT_InstallIRQRoutedHandler(aui.card_irq, MAIN_IntHandlePM.wrapper_cs, MAIN_IntHandlePM.wrapper_offset,
MAIN_IntHandleRM.wrapper_cs, (uint16_t)MAIN_IntHandleRM.wrapper_offset);

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