Replaced the VHDL parser with the VHDL scanner from 1.7.5 to avoid po…

…tential licensing issues
doxygen · May 18, 2014 · 99433b3 · 99433b3
1 parent 28f40b3
commit 99433b3
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Showing 15 changed files with 2,813 additions and 6,519 deletions.
diff --git a/src/Makefile.in b/src/Makefile.in
@@ -48,7 +48,6 @@ distclean: clean
 	       ce_parse.cpp ce_parse.h tag.cpp commentscan.cpp \
 	       declinfo.cpp defargs.cpp commentcnv.cpp doctokenizer.cpp \
 	       pycode.cpp pyscanner.cpp fortrancode.cpp fortranscanner.cpp \
-	       vhdlscanner.cpp vhdlcode.cpp tclscanner.cpp vhdlparser.h \
-	       vhdlparser.cpp
+	       vhdlscanner.cpp vhdlcode.cpp tclscanner.cpp
 
 FORCE:
diff --git a/src/context.cpp b/src/context.cpp
@@ -23,6 +23,7 @@
 #include "membername.h"
 #include "parserintf.h"
 #include "portable.h"
+#include "arguments.h"
 
 // TODO: pass the current file to Dot*::writeGraph, so the user can put dot graphs in other
 //       files as well

diff --git a/src/docparser.cpp b/src/docparser.cpp
@@ -2904,8 +2904,6 @@ void DocVhdlFlow::parse()
   DBG(("DocVhdlFlow::parse() end\n"));
   DocNode *n=g_nodeStack.pop();
   ASSERT(n==this);
-
-  VhdlDocGen::createFlowChart(g_memberDef);
 }
 
 

diff --git a/src/doxygen.cpp b/src/doxygen.cpp
@@ -11049,7 +11049,7 @@ void parseInput()
   flushUnresolvedRelations();
   if (Config_getBool("OPTIMIZE_OUTPUT_VHDL"))
   {
-    VhdlDocGen::computeVhdlComponentRelations(); 
+    VhdlDocGen::computeVhdlComponentRelations();
   }
   computeClassRelations();
   g_classEntries.clear();
@@ -11192,13 +11192,6 @@ void parseInput()
   g_s.begin("Adding members to index pages...\n");
   addMembersToIndex();
   g_s.end();
-
-  if (Config_getBool("OPTIMIZE_OUTPUT_VHDL") && 
-      Config_getBool("HAVE_DOT") &&
-      Config_getEnum("DOT_IMAGE_FORMAT")=="svg")
-  {
-    VhdlDocGen::writeOverview();
-  }
 }
 
 void generateOutput()

diff --git a/src/htmldocvisitor.cpp b/src/htmldocvisitor.cpp
@@ -1773,35 +1773,14 @@ void HtmlDocVisitor::visitPost(DocHtmlBlockQuote *b)
   forceStartParagraph(b);
 }
 
-void HtmlDocVisitor::visitPre(DocVhdlFlow *vf)
+void HtmlDocVisitor::visitPre(DocVhdlFlow *)
 {
   if (m_hide) return;
-  if (VhdlDocGen::getFlowMember()) // use VHDL flow chart creator
-  {
-    forceEndParagraph(vf);
-    QCString fname=FlowChart::convertNameToFileName(); 
-    m_t << "<p>";
-    m_t << "flowchart: " ; // TODO: translate me
-    m_t << "<a href=\"";
-    m_t << fname.data(); 
-    m_t << ".svg\">";
-    m_t << VhdlDocGen::getFlowMember()->name().data(); 
-    m_t << "</a>";
-    if (vf->hasCaption())
-    {
-      m_t << "<br />";
-    }
-  }
 }
 
-void HtmlDocVisitor::visitPost(DocVhdlFlow *vf)
+void HtmlDocVisitor::visitPost(DocVhdlFlow *)
 {
   if (m_hide) return;
-  if (VhdlDocGen::getFlowMember()) // use VHDL flow chart creator
-  {
-    m_t << "</p>";
-    forceStartParagraph(vf);
-  }
 }
 
 void HtmlDocVisitor::visitPre(DocParBlock *)

diff --git a/src/index.cpp b/src/index.cpp
@@ -2053,10 +2053,6 @@ static void writeAnnotatedIndex(OutputList &ol)
   QCString title = lne ? lne->title() : theTranslator->trCompoundList();
   bool addToIndex = lne==0 || lne->visible();
 
-  if (Config_getBool("OPTIMIZE_OUTPUT_VHDL")) 
-  {
-    VhdlDocGen::findConstraintFile(lne);
-  }
 
   startFile(ol,"annotated",0,title,HLI_Annotated);
 

diff --git a/src/libdoxygen.pro.in b/src/libdoxygen.pro.in
@@ -201,7 +201,6 @@ SOURCES      =	arguments.cpp \
                 ../generated_src/doxygen/ce_parse.cpp \
                 ../generated_src/doxygen/constexp.cpp \
 		../generated_src/doxygen/vhdlcode.cpp \
-		../generated_src/doxygen/vhdlparser.cpp \
 		../generated_src/doxygen/vhdlscanner.cpp \
 		../generated_src/doxygen/code.cpp \
 		../generated_src/doxygen/commentcnv.cpp \

diff --git a/src/libdoxygen.t.in b/src/libdoxygen.t.in
@@ -111,16 +111,9 @@ sub GenerateLex {
 	$(YACC) -l -d -p ce_parsexpYY constexp.y -o \$(GENERATED_SRC)/ce_parse.c 
 	-rm $(GENERATED_SRC)/ce_parse.c
 
-#$ GenerateDep("\$(GENERATED_SRC)/vhdlscanner.cpp","vhdlscanner.l","\$(GENERATED_SRC)/vhdlparser.h");
+#$ GenerateDep("\$(GENERATED_SRC)/vhdlscanner.cpp","vhdlscanner.l");
 #$ GenerateLex("vhdlscanner",1);
 
-#$ GenerateDep("\$(GENERATED_SRC)/vhdlparser.cpp","vhdlparser.y");
-	$(YACC) -l -p vhdlscannerYY vhdlparser.y -o \$(GENERATED_SRC)/vhdlparser.cpp 	
-
-#$ GenerateDep("\$(GENERATED_SRC)/vhdlparser.h","vhdlparser.y");
-	$(YACC) -l -d -p vhdlscannerYY vhdlparser.y -o \$(GENERATED_SRC)/vhdlparser.c 
-	-rm $(GENERATED_SRC)/vhdlparser.c	
-
 TO_C_CMD=$(PYTHON) to_c_cmd.py < $< > $@
 
 #$ GenerateDep("layout.cpp","\$(GENERATED_SRC)/layout_default.xml.h");

diff --git a/src/outputlist.cpp b/src/outputlist.cpp
@@ -169,8 +169,6 @@ void OutputList::writeDoc(DocRoot *root,Definition *ctx,MemberDef *md)
     //    ctx?ctx->getDefFileExtension().data():"<null>");
     if (og->isEnabled()) og->writeDoc(root,ctx,md);
   }
-
-  VhdlDocGen::setFlowMember(0);
 }
 
 bool OutputList::parseText(const QCString &textStr)