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Academic project for the course of Digital Systems Design. The aim of the project was to design and implement an IIR audio filter on FPGA

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gabrielebaris/iir-audio-filter-fpga

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IIR Filter on FPGA

This project has been developed for the course of Digital Systems Design, Master of Engineering in Embedded Computing Systems (University of Pisa and Sant'Anna School of Advanced Studies).

Requirements

Design a digital circuit which implements a simple IIR filter for audio applications

y[n] = y[n-1] - 0.25·x[n] + 0.25·x[n-4]

Such filter allows to attenuate signal components which have half the frequency of the sampling one.

Refer to a possible 16-bit wav format.

Tools

The tools used for the project were

Project structure

The project folder resembles the following structure:

  • matlab: MATLAB design files
  • report: .pdf report file
  • db
    • src: VHDL source files
    • tb: VHDL testbench files
  • active_hdl: Active-HDL project folder
  • vivado_synth: Vivado project folder

The design workflow can be found in the report file.

License

This project is licensed under the MIT License - see the LICENSE file for details

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Academic project for the course of Digital Systems Design. The aim of the project was to design and implement an IIR audio filter on FPGA

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