Make Symbiflow use systemVerilogSource files

olofk · Aug 16, 2023 · c7e7f0e · c7e7f0e
1 parent 1a5f926
commit c7e7f0e
Showing 1 changed file with 2 additions and 0 deletions.
diff --git a/edalize/symbiflow.py b/edalize/symbiflow.py
@@ -257,6 +257,8 @@ def configure_vpr(self):
         for f in src_files:
             if f.file_type in ["verilogSource"]:
                 file_list.append(f.name)
+            if f.file_type in ["systemVerilogSource"]:
+                file_list.append(f.name)
             if f.file_type in ["SDC"]:
                 timing_constraints.append(f.name)
             if f.file_type in ["PCF"]: