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libero: add run support #408

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Allow users to program FPGA targets with edalize.

snippet of the output of the run stage:

$ time fusesoc run --target polarfire_splashkit fusesoc:utils:blinky --flashpro5_freq 30000000
INFO: Preparing fusesoc:utils:blinky:1.1.1                                                                                                                                                                                                                                                                                     
INFO: Setting up project                                                                                                                                                                                                                                                                                                       
INFO: Set Libero tool option range to default value IND                                                                                                                                                                                                                                                                        
INFO: Cores and Libero TCL Scripts generated.                                                                                                                                                                                                                                                                                  
INFO: Executing Libero TCL Scripts: fusesoc_utils_blinky_1_1_1-build.tcl                                                                                                                                                                                                                                                       
...
INFO: Running                                                                                                                                                                                                                                                                                                                  
INFO: Executing Libero TCL Scripts: fusesoc_utils_blinky_1_1_1-run.tcl                                                                                                                                                                                                                                                         
...
Generating Bitstream File Finished: Wed Dec 27 19:45:32 2023 (Elapsed time 00:01:26)

Programmer 'E2008ETVQU' : JTAG TCK / SPI SCK frequency = 1 MHz
programmer 'E2008ETVQU' : FlashPro5
Programmer 'E2008ETVQU' : JTAG TCK / SPI SCK frequency = 1 MHz
programmer 'E2008ETVQU' : FlashPro5
programmer 'E2008ETVQU' : Scan Chain...
Programmer 'E2008ETVQU' : JTAG TCK / SPI SCK frequency = 1 MHz
programmer 'E2008ETVQU' : Found 8 instruction register bits.
programmer 'E2008ETVQU' : Checking IDCODEs...
programmer 'E2008ETVQU' : Device 1: 5F8131CF Mfr: Microsemi Part: MPF300(T|TS|TL|TLS)
programmer 'E2008ETVQU' : Check Chain...
programmer 'E2008ETVQU' : Scan and Check Chain PASSED.
Executing programming action PROGRAM in JTAG mode...
...
Warning:  FlashPro5 TCK was set to 30000000, but has been reduced to 15000000 to meet the minimum max TCK of the chain.
programmer 'E2008ETVQU' : Scan Chain...
Programmer 'E2008ETVQU' : JTAG TCK / SPI SCK frequency = 1 MHz
programmer 'E2008ETVQU' : Check Chain...
programmer 'E2008ETVQU' : Scan and Check Chain PASSED.
programmer 'E2008ETVQU' : device 'MPF300TS' : Executing action PROGRAM
Programmer 'E2008ETVQU' : JTAG TCK / SPI SCK frequency = 15 MHz
programmer 'E2008ETVQU' : device 'MPF300TS' : EXPORT Algo_version[16] = 0002
programmer 'E2008ETVQU' : device 'MPF300TS' : EXPORT IDCODE[32] = 5f8131cf
programmer 'E2008ETVQU' : device 'MPF300TS' : EXPORT ISC_ENABLE_RESULT[32] = 00000000
programmer 'E2008ETVQU' : device 'MPF300TS' : EXPORT CRCERR[1] = 0
programmer 'E2008ETVQU' : device 'MPF300TS' : Programming Mode: JTAG
programmer 'E2008ETVQU' : device 'MPF300TS' : Programming FPGA Array and sNVM...
programmer 'E2008ETVQU' : device 'MPF300TS' : EXPORT BITS component bitstream digest[256] = e628346f15f57b0bb57f2a9a7ba39a841126caa067b4873fa03d218c2fd0001c
programmer 'E2008ETVQU' : device 'MPF300TS' : EXPORT Fabric component bitstream digest[256] = cf459e18cc7c8c9a3332fb9200514d00ea3ddacc79180c6abd90e6fc668219e5
programmer 'E2008ETVQU' : device 'MPF300TS' : EXPORT sNVM component bitstream digest[256] = 5be2c46034b57c38c42d122e5e3f79210b3d951f2835134116d6ad65c712bad3
programmer 'E2008ETVQU' : device 'MPF300TS' : EXPORT EOB component bitstream digest[256] = 08ff1765386457cd9485b5abaef664113cca707975152629bf868d41e6256ee3
programmer 'E2008ETVQU' : device 'MPF300TS' : ===================================================================================
programmer 'E2008ETVQU' : device 'MPF300TS' : EXPORT DSN[128] = 76b864bd2bdb45e66ecada4bf5475b41
programmer 'E2008ETVQU' : device 'MPF300TS' : ===================================================================================
programmer 'E2008ETVQU' : device 'MPF300TS' : Finished: Wed Dec 27 19:49:28 2023 (Elapsed time 00:03:39)
programmer 'E2008ETVQU' : device 'MPF300TS' : Executing action PROGRAM PASSED.
programmer 'E2008ETVQU' : Chain programming PASSED.
Chain Programming Finished: Wed Dec 27 19:49:28 2023 (Elapsed time 00:03:39)

                        o - o - o - o - o - o

The 'run_selected_actions' command succeeded.
Project saved.
The 'save_project' command succeeded.
Project closed.
The 'close_project' command succeeded.
The Execute Script command succeeded.
Exported log file /home/lvb/wip/polarfire/test-fusesoc/blinky/build/fusesoc_utils_blinky_1.1.1/polarfire_splashkit-libero/prj/designer/blinky_polarfire_splashkit/blinky_polarfire_splashkit_fp/blinky_polarfire_splashkit_PROGRAM.log.
The fusesoc_utils_blinky_1_1_1 project was closed.
The Execute Script command succeeded.

real    9m12.526s
user    5m28.926s
sys     2m19.646s
```

It takes a fairly long time to program, but that's the same through libero.

These files actually implement the build stage and not the run stage.
Rename them in preparation for the addition of run stage support.

Signed-off-by: Liam Beguin <liambeguin@gmail.com>
In preparation for the addition of the run stage, factorize the call to
the libero binary so it can be reused.

Signed-off-by: Liam Beguin <liambeguin@gmail.com>
Add support for loading a bitstream on target.

Signed-off-by: Liam Beguin <liambeguin@gmail.com>
@liambeguin
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liambeguin commented Dec 28, 2023

Hi @olofk,

Here's my first pass at implementing the run stage. I'll try to look into the new API too.
Do you have a good example for me to follow? otherwise I'll just look through the repo.

I was also wondering if there's a way to just execute the run stage.
Assuming I've erased the FPGA (or I'm just testing a script) I could reuse built files instead of having to regenerate the full project.

I was also thinking of implementing something to read the device info. Is there a way to support that in FuseSoC? I couldn't find anything in the documentation.

Cheers,
Liam

Signed-off-by: Liam Beguin <liambeguin@gmail.com>
in TCL, join takes a list as first parameter and a separator as second.
Update function call to match that, and fix relative path making the
expansion null!

Signed-off-by: Liam Beguin <liambeguin@gmail.com>
Signed-off-by: Liam Beguin <liambeguin@gmail.com>
This was causing string parameters to be ignored during synthesis,
preventing things like:

	fusesoc run servant --target=polarfire_splashkit --memfile=anything.hex

Signed-off-by: Liam Beguin <liambeguin@gmail.com>
@olofk
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olofk commented Jan 11, 2024

Thanks for this. Highly appreciate the well-structured commits! It looks great overall, but I have some questions/comments on the programmer addition. Do we need to specify all these parameters for the different Flashpro devices? The general rule in Edalize is to avoid hard coding things like this, so that the user is free to set them as needed.

I would also like to mention that long-term I would really really like device programming be handled by some external library so that all projects that need to program an FPGA can share that code. The current implementation in Edalize turned out to be a bit naive. When I started this in 2011 I assumed there would be one programmer per EDA tool, but in reality there can be many different tools, so this needs an overhaul. A bit of historical context here olofk/fusesoc#319 . This doesn't affect any of your work, but I'm mentioning it in the hope that someone someday will create a library I can use :)

When it comes to a Flow API implementation of the Libero backend, I would suggest looking at the Vivado or Efinity tool classes, which probably are the closest ones. You need a setup function which goes through the EDAM structure and sets up all command that the flow will execute, and a write_config_files function that actually writes the TCL templates and such. One thing I would like to see in this port is to use file "tags", which is a quite new concept, for the TCL files. One issue with the current Libero backend is that TCL files is used in a lot of places, but there's not a good way to tell Edalize which stage of Libero that should consume a particular TCL file. tags are supposed to help with that.

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