Add Vivado power optimization option flag

edalize/templates/vivado/vivado-run.tcl.j2

@@ -1,5 +1,9 @@
 # Create a bin file which can be used to program the flash on the FPGA
 set_property STEPS.WRITE_BITSTREAM.ARGS.BIN_FILE true [get_runs impl_1]
+{% if tool_options.power_opt == 1 -%}
+# Enable power optimizations during implementation
+set_property strategy Power_DefaultOpt [get_runs impl_1]
+{%- endif %}
 
 # Vivado will raise an error if impl_1 is launched when it is already done. So
 # check the progress first and only launch if its not complete.
@@ -31,4 +35,4 @@ if { [get_property PROGRESS [get_runs impl_1]] != "100%"} {
 # default bitstream in the "Program Device" dialog; non-standard names need to
 # be selected from a file picker first.
 set vivadoDefaultBitstreamFile [ get_property DIRECTORY [current_run] ]/[ get_property top [current_fileset] ].bit
-file copy -force $vivadoDefaultBitstreamFile [pwd]/[current_project].bit
+file copy -force $vivadoDefaultBitstreamFile [pwd]/[current_project].bit

edalize/tools/templates/vivado/vivado-run.tcl.j2

@@ -1,5 +1,9 @@
 # Create a bin file which can be used to program the flash on the FPGA
 set_property STEPS.WRITE_BITSTREAM.ARGS.BIN_FILE true [get_runs impl_1]
+{% if power_opt == 1 -%}
+# Enable power optimizations during implementation
+set_property strategy Power_DefaultOpt [get_runs impl_1]
+{%- endif %}
 
 # Vivado will raise an error if impl_1 is launched when it is already done. So
 # check the progress first and only launch if its not complete.
@@ -30,4 +34,4 @@ if { [get_property PROGRESS [get_runs impl_1]] != "100%"} {
 # default bitstream in the "Program Device" dialog; non-standard names need to
 # be selected from a file picker first.
 set vivadoDefaultBitstreamFile [ get_property DIRECTORY [current_run] ]/[ get_property top [current_fileset] ].bit
-file copy -force $vivadoDefaultBitstreamFile [pwd]/[current_project].bit
+file copy -force $vivadoDefaultBitstreamFile [pwd]/[current_project].bit

edalize/tools/vivado.py

@@ -64,6 +64,10 @@ class Vivado(Edatool):
             "type": "str",
             "desc": "A pattern matching a board identifier. Refer to the Vivado documentation for ``get_hw_targets`` for details. Example: ``*/xilinx_tcf/Digilent/123456789123A``",
         },
+        "power_opt": {
+            "type": "int",
+            "desc": "When set to 1, it enables the Power Optimization stage during implementation.",
+        },
     }
 
     def get_version(self):
@@ -182,9 +186,11 @@ def setup(self, edam):
             "bd_files": bd_files,
         }
         jobs = self.tool_options.get("jobs", None)
+        power_opt = self.tool_options.get("power_opt", None)
 
         self.run_template_vars = {
-            "jobs": " -jobs " + str(jobs) if jobs is not None else ""
+            "jobs": " -jobs " + str(jobs) if jobs is not None else "",
+            "power_opt": power_opt if power_opt is not None else 0,
         }
 
         self.synth_template_vars = {

edalize/vivado.py

@@ -91,6 +91,11 @@ def get_doc(cls, api_ver):
                         "type": "String",
                         "desc": "",
                     },
+                    {
+                        "name": "power_opt",
+                        "type": "int",
+                        "desc": "When defined, it enables the Power Optimization stage during implementation.",
+                    },
                 ],
             }
 
@@ -129,4 +134,4 @@ def build_pre(self):
         pass
 
     def build_post(self):
-        pass
+        pass