p9_fab_iovalid -- invoke link validation subroutine

  call to p9_fab_iovalid_link_validate was missing, invoke to verify link
  state when HWP is called to raise iovalid

CMVC-Prereq: 1018466
Change-Id: I43872a281c008d52d88c05f662adeb5f51f4e524
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37095
Reviewed-by: CHRISTINA L. GRAVES <clgraves@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37097
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

src/build/citest/etc/patches/p9n.act_fab_io_patch

@@ -0,0 +1,55 @@
+--- p9n.act	2017-03-07 08:37:49.679835166 -0600
++++ p9n.act_fab_io	2017-03-07 08:39:34.260687072 -0600
+@@ -45,6 +45,7 @@
+ #                                      cores.
+ #        SW374348  bjs       01/27/17  Additional updates for fused core brkpts
+ #                                      (requires SIMICs change for full function)
++#        SW382230  thi       03/07/17  Need action for Fab IO validation
+ #
+
+ # Minimal SBE action to get Hostboot started
+@@ -2165,3 +2166,44 @@
+  CAUSE: TARGET=[FUSEDCORE(0)] OP=[BIT,ON] BIT=[31]
+  EFFECT: TARGET=[REG(MYCHIPLET, 0x10AB3)] OP=[BIT,ON] BIT=[63]
+ }
++
++################################################################################################
++# IOVALID XBUS/OBUS
++################################################################################################
++CAUSE_EFFECT {
++  LABEL=[XBUS/OBUS IOVALID Link Update]
++  WATCH=[REG(0x06000019)]
++  CAUSE: TARGET=[REG(0x06000019)] OP=[AND,ON,BUF,MASK] DATA=[LITERAL(64,0x0FC00000 0x00000000)] MASK=[LITERAL(64,0x0FC00000 0x00000000)]
++  EFFECT: TARGET=[REG(0x06011800)] OP=[BIT,ON] BIT=[0]  # XBUS 0  L0 DL TRAINED
++  EFFECT: TARGET=[REG(0x06011800)] OP=[BIT,ON] BIT=[1]  # XBUS    L1 DL TRAINED
++  EFFECT: TARGET=[REG(0x06011C00)] OP=[BIT,ON] BIT=[0]  # XBUS 1  L0 DL TRAINED
++  EFFECT: TARGET=[REG(0x06011C00)] OP=[BIT,ON] BIT=[1]  # XBUS    L1 DL TRAINED
++  EFFECT: TARGET=[REG(0x06012000)] OP=[BIT,ON] BIT=[0]  # XBUS 2  L0 DL TRAINED
++  EFFECT: TARGET=[REG(0x06012000)] OP=[BIT,ON] BIT=[1]  # XBUS    L1 DL TRAINED
++  EFFECT: TARGET=[REG(0x05013400)] OP=[BIT,ON] BIT=[0]  # XBUS 0  FMR00 TL TRAINED
++  EFFECT: TARGET=[REG(0x05013400)] OP=[BIT,ON] BIT=[1]  # XBUS    FMR01 TL TRAINED
++  EFFECT: TARGET=[REG(0x05013400)] OP=[BIT,ON] BIT=[2]  # XBUS 1  FMR02 TL TRAINED
++  EFFECT: TARGET=[REG(0x05013400)] OP=[BIT,ON] BIT=[3]  # XBUS    FMR03 TL TRAINED
++  EFFECT: TARGET=[REG(0x05013400)] OP=[BIT,ON] BIT=[4]  # XBUS 2  FMR04 TL TRAINED
++  EFFECT: TARGET=[REG(0x05013400)] OP=[BIT,ON] BIT=[5]  # XBUS    FMR05 TL TRAINED
++
++  EFFECT: TARGET=[REG(0x09010800)] OP=[BIT,ON] BIT=[0]  # OBUS 0  L0 DL TRAINED  OPTICAL
++  EFFECT: TARGET=[REG(0x09010800)] OP=[BIT,ON] BIT=[1]  # OBUS    L1 DL TRAINED
++  EFFECT: TARGET=[REG(0x0C010800)] OP=[BIT,ON] BIT=[0]  # OBUS 3  L0 DL TRAINED  OPTICAL
++  EFFECT: TARGET=[REG(0x0C010800)] OP=[BIT,ON] BIT=[1]  # OBUS    L1 DL TRAINED
++  EFFECT: TARGET=[REG(0x05013800)] OP=[BIT,ON] BIT=[0]  # OBUS 0  FMR00 TL TRAINED  OPTICAL
++  EFFECT: TARGET=[REG(0x05013800)] OP=[BIT,ON] BIT=[1]  # OBUS    FMR01 TL TRAINED
++  EFFECT: TARGET=[REG(0x05013800)] OP=[BIT,ON] BIT=[6]  # OBUS 3  FMR00 TL TRAINED  OPTICAL
++  EFFECT: TARGET=[REG(0x05013800)] OP=[BIT,ON] BIT=[7]  # OBUS    FMR01 TL TRAINED
++
++# Note: for reference, Cumulus only
++#  EFFECT: TARGET=[REG(0x0A010800)] OP=[BIT,ON] BIT=[0]  # OBUS 1  L0 DL TRAINED  OPTICAL
++#  EFFECT: TARGET=[REG(0x0A010800)] OP=[BIT,ON] BIT=[1]  # OBUS    L1 DL TRAINED
++#  EFFECT: TARGET=[REG(0x0B010800)] OP=[BIT,ON] BIT=[0]  # OBUS 2  L0 DL TRAINED  OPTICAL
++#  EFFECT: TARGET=[REG(0x0B010800)] OP=[BIT,ON] BIT=[1]  # OBUS    L1 DL TRAINED
++#  EFFECT: TARGET=[REG(0x05013800)] OP=[BIT,ON] BIT=[2]  # OBUS 1  FMR00 TL TRAINED  OPTICAL
++#  EFFECT: TARGET=[REG(0x05013800)] OP=[BIT,ON] BIT=[3]  # OBUS    FMR01 TL TRAINED
++#  EFFECT: TARGET=[REG(0x05013800)] OP=[BIT,ON] BIT=[4]  # OBUS 2  FMR00 TL TRAINED  OPTICAL
++#  EFFECT: TARGET=[REG(0x05013800)] OP=[BIT,ON] BIT=[5]  # OBUS    FMR01 TL TRAINED
++
++}

src/build/citest/etc/patches/patchlist.txt

@@ -5,3 +5,8 @@ Brief description of the problem or reason for patch
 -Files: list of files
 -Coreq: list of associated changes, e.g. workarounds.presimsetup
 
+Need additional actions for FAB IOVALID validation
+-RTC: 170736
+-CMVC: 	1018466
+-Files: p9n.act
+-Coreq: workarounds.postsimsetup

src/build/citest/etc/workarounds.postsimsetup

@@ -38,3 +38,15 @@
 sbex -t 1018118
 cd $sb/engd/href/
 mk -a -k
+
+### RTC 170736 - Patch begins
+echo "+++ Updating p9n.act file for p9_fab_iovalid_link_validate"
+echo "+++ SB: " $sb
+echo "+++ BACKING_BUILD: " $BACKING_BUILD
+echo "+++ PROJECT_ROOT: " $PROJECT_ROOT
+
+mkdir -p  $sb/simu/data/cec-chip/
+cp $BACKING_BUILD/src/simu/data/cec-chip/p9n.act $sb/simu/data/cec-chip/
+patch -p0 $sb/simu/data/cec-chip/p9n.act $PROJECT_ROOT/src/build/citest/etc/patches/p9n.act_fab_io_patch
+### RTC 170736 - Patch ends
+

src/import/chips/p9/procedures/hwp/nest/p9_fab_iovalid.C

@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2015,2016                        */
+/* Contributors Listed Below - COPYRIGHT 2015,2017                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -385,6 +385,10 @@ p9_fab_iovalid(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
                                      l_x_agg_link_delay[l_link_id]),
                                  "Error from p9_fab_iovalid_get_link_delays (X, optical)");
                     }
+
+                    FAPI_TRY(p9_fab_iovalid_link_validate(i_target,
+                                                          P9_FBC_XBUS_LINK_CTL_ARR[l_link_id]),
+                             "Error from p9_fab_iovalid_link_validate (X)");
                 }
             }
         }
@@ -416,6 +420,10 @@ p9_fab_iovalid(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
                                  P9_FBC_ABUS_LINK_CTL_ARR[l_a_rem_link_id[l_link_id]],
                                  l_a_agg_link_delay[l_link_id]),
                              "Error from p9_fab_iovalid_get_link_delays (A)");
+
+                    FAPI_TRY(p9_fab_iovalid_link_validate(i_target,
+                                                          P9_FBC_ABUS_LINK_CTL_ARR[l_link_id]),
+                             "Error from p9_fab_iovalid_link_validate (A)");
                 }
             }
         }