dd1 workaround for hw400075 coherency error

Change-Id: I09ba40e8b92f7800a4843ff562cea3fbb75383c5 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35235 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: LUKE MURRAY <murrayl@us.ibm.com> Reviewed-by: Brian R. Silver <bsilver@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35259 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
open-power · Jan 30, 2017 · 31cc2fa · 31cc2fa
1 parent 19f6e06
commit 31cc2fa
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diff --git a/src/import/chips/p9/initfiles/p9.mcs.scom.initfile b/src/import/chips/p9/initfiles/p9.mcs.scom.initfile
@@ -92,3 +92,9 @@ ispy  MC01.PBI01.SCOMFIR.MCPERF1_ENABLE_PF_DROP_SRQ [when=S] {
   0;
 }
 
+# HW400075 Always set MDI to 1 for ttypes cp_me and cp_m
+ispy  MC01.PBI01.SCOMFIR.MCMODE2_DISABLE_MDI0 [when=S && ATTR_CHIP_EC_FEATURE_HW40075] {
+  spyv;
+  0b0001100000000;
+}
+
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_mcs_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_mcs_scom.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2016                             */
+/* Contributors Listed Below - COPYRIGHT 2016,2017                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -31,6 +31,7 @@ using namespace fapi2;
 
 constexpr uint64_t literal_0b0111 = 0b0111;
 constexpr uint64_t literal_0 = 0;
+constexpr uint64_t literal_0b0001100000000 = 0b0001100000000;
 
 fapi2::ReturnCode p9_mcs_scom(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& TGT0)
 {
@@ -50,6 +51,12 @@ fapi2::ReturnCode p9_mcs_scom(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& TGT0)
             l_scom_buffer.insert<10, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCMODE1_DISABLE_FP_M_BIT_ON );
             FAPI_TRY(fapi2::putScom(TGT0, 0x5010812ull, l_scom_buffer));
         }
+        {
+            FAPI_TRY(fapi2::getScom( TGT0, 0x5010813ull, l_scom_buffer ));
+
+            l_scom_buffer.insert<1, 13, 51, uint64_t>(literal_0b0001100000000 );
+            FAPI_TRY(fapi2::putScom(TGT0, 0x5010813ull, l_scom_buffer));
+        }
 
     };
 fapi_try_exit:

diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
@@ -2008,6 +2008,23 @@
     </chipEcFeature>
   </attribute>
 
+  <attribute>
+    <id>ATTR_CHIP_EC_FEATURE_HW40075</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>
+      Addresses issue where MDI bit was getting wrong values with threadmill and transactional data resulting in coherency issues.
+    </description>
+    <chipEcFeature>
+      <chip>
+        <name>ENUM_ATTR_NAME_NIMBUS</name>
+        <ec>
+          <value>0x20</value>
+          <test>LESS_THAN</test>
+        </ec>
+      </chip>
+    </chipEcFeature>
+  </attribute>
+
   <attribute>
     <id>ATTR_CHIP_EC_FEATURE_MSS_TRAINING_BAD_BITS</id>
     <targetType>TARGET_TYPE_PROC_CHIP</targetType>