Initfile updates for FBC DD2

Change-Id: I18bf87b49f9bfba577bfc55fdf3cadc1fe09849f Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39973 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: DANIEL C. HOWE <dchowe@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Dev-Ready: Thi N. Tran <thi@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39975 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
open-power · May 22, 2017 · 5156dbe · 5156dbe
1 parent c916edc
commit 5156dbe
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diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_cd_hp_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_cd_hp_scom.C
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_ioe_tl_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_ioe_tl_scom.C
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_ioo_tl_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_ioo_tl_scom.C
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_ioo_tl_scom.H b/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_ioo_tl_scom.H
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2016                             */
+/* Contributors Listed Below - COPYRIGHT 2016,2017                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -31,12 +31,14 @@
 #include <fapi2.H>
 
 
-typedef fapi2::ReturnCode (*p9_fbc_ioo_tl_scom_FP_t)(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&);
+typedef fapi2::ReturnCode (*p9_fbc_ioo_tl_scom_FP_t)(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&,
+        const fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>&);
 
 extern "C"
 {
 
-    fapi2::ReturnCode p9_fbc_ioo_tl_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& TGT0);
+    fapi2::ReturnCode p9_fbc_ioo_tl_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& TGT0,
+                                         const fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>& TGT1);
 
 }
 

diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_no_hp_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_no_hp_scom.C
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_scominit.C b/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_scominit.C
@@ -202,7 +202,7 @@ fapi2::ReturnCode p9_chiplet_scominit(const fapi2::Target<fapi2::TARGET_TYPE_PRO
     l_obus_chiplets = i_target.getChildren<fapi2::TARGET_TYPE_OBUS>();
 
     FAPI_DBG("Invoking p9.fbc.ioo_tl.scom.initfile on target %s...", l_procTargetStr);
-    FAPI_EXEC_HWP(l_rc, p9_fbc_ioo_tl_scom, i_target);
+    FAPI_EXEC_HWP(l_rc, p9_fbc_ioo_tl_scom, i_target, FAPI_SYSTEM);
 
     if (l_rc)
     {

diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_fbc_eff_config.C b/src/import/chips/p9/procedures/hwp/nest/p9_fbc_eff_config.C
@@ -63,9 +63,17 @@ const uint32_t EPSILON_W_T1_LE[] = {    9,   10,   11,   13,   15,   27 };
 // HE epsilon (4 chips per-group)
 const uint32_t EPSILON_R_T0_HE[] = {    7,    7,    8,    8,   10,   22 };
 const uint32_t EPSILON_R_T1_HE[] = {   77,   78,   81,   84,   89,  113 };
-const uint32_t EPSILON_R_T2_HE[] = {  168,  170,  172,  175,  180,  204 };
+const uint32_t EPSILON_R_T2_HE[] = {  187,  189,  191,  194,  199,  223 };
 const uint32_t EPSILON_W_T0_HE[] = {   12,   13,   14,   16,   18,   30 };
-const uint32_t EPSILON_W_T1_HE[] = {   76,   77,   78,   80,   82,   94 };
+const uint32_t EPSILON_W_T1_HE[] = {   96,   97,   98,   99,  102,  114 };
+
+// TODO: These values need to be selected for flat 8 topology systems.
+// HE epsilon (1x8)
+// const uint32_t EPSILON_R_T0_F8[] = {    7,    7,    8,    8,   10,   22 };
+// const uint32_t EPSILON_R_T1_F8[] = {    7,    7,    8,    8,   10,   22 };
+// const uint32_t EPSILON_R_T2_F8[] = {  145,  146,  149,  152,  157,  181 };
+// const uint32_t EPSILON_W_T0_F8[] = {    0,    0,    0,    0,    0,    5 };
+// const uint32_t EPSILON_W_T1_F8[] = {   73,   74,   75,   77,   79,   91 };
 
 
 //------------------------------------------------------------------------------

diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_sys_chiplet_scominit.C b/src/import/chips/p9/procedures/hwp/nest/p9_sys_chiplet_scominit.C
@@ -50,14 +50,15 @@
 fapi2::ReturnCode p9_sys_chiplet_scominit(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target)
 {
     fapi2::ReturnCode l_rc;
+    fapi2::Target<fapi2::TARGET_TYPE_SYSTEM> FAPI_SYSTEM;
     std::vector<fapi2::Target<fapi2::TARGET_TYPE_OBUS>> l_obus_chiplets;
     FAPI_DBG("Start");
 
     do
     {
         // Invoke IOO (OBUS FBC IO) SCOM initfiles
         FAPI_DBG("Invoking p9.fbc.ioo_tl.scom.initfile...");
-        FAPI_EXEC_HWP(l_rc, p9_fbc_ioo_tl_scom, i_target);
+        FAPI_EXEC_HWP(l_rc, p9_fbc_ioo_tl_scom, i_target, FAPI_SYSTEM);
 
         if (l_rc)
         {

diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
@@ -3335,4 +3335,22 @@
       </chip>
     </chipEcFeature>
   </attribute>
+  <!-- ******************************************************************** -->
+  <attribute>
+    <id>ATTR_CHIP_EC_FEATURE_DD1_FBC_SETTINGS</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>
+      DD1 FBC setting differs from DD2, ex. lo_limit adjustment. True if:
+      Nimbus EC less than 20
+    </description>
+    <chipEcFeature>
+      <chip>
+        <name>ENUM_ATTR_NAME_NIMBUS</name>
+        <ec>
+          <value>0x20</value>
+          <test>LESS_THAN</test>
+        </ec>
+      </chip>
+    </chipEcFeature>
+  </attribute>
 </attributes>