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XSCOM/LPC Workaround for Nimbus DD1
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There is a shared resource between the XSCOM and LPC logic that
leads to errors at the XSCOM level causing errors to be detected
during LPC operations.  This commit adds an external interface
to access block LPC operations while an XSCOM operation is in
flight.

Change-Id: I571094dfb666aa9198fabec5280a0f45c62c90ba
RTC: 167291
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36399
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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dcrowell77 committed Feb 16, 2017
1 parent 1987418 commit 6f93bd2
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Showing 4 changed files with 83 additions and 4 deletions.
9 changes: 8 additions & 1 deletion src/include/usr/lpc/lpcif.H
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Expand Up @@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
/* Contributors Listed Below - COPYRIGHT 2014 */
/* Contributors Listed Below - COPYRIGHT 2014,2017 */
/* [+] Google Inc. */
/* [+] International Business Machines Corp. */
/* */
Expand Down Expand Up @@ -59,6 +59,13 @@ enum TransType {
errlHndl_t create_altmaster_objects( bool i_create,
TARGETING::Target* i_proc );

/**
* @brief Block/unblock all LPC operations
* @param[in] i_block true: block ops, false: allow ops
*/
void block_lpc_ops( bool i_block );


}; // namespace LPC

#endif // end __LPCIF_H
15 changes: 14 additions & 1 deletion src/usr/lpc/lpcdd.C
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Expand Up @@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
/* Contributors Listed Below - COPYRIGHT 2014,2016 */
/* Contributors Listed Below - COPYRIGHT 2014,2017 */
/* [+] Google Inc. */
/* [+] International Business Machines Corp. */
/* */
Expand Down Expand Up @@ -363,6 +363,19 @@ errlHndl_t create_altmaster_objects( bool i_create,
return l_err;
}


/**
* @brief Block/unblock all LPC operations
* @param[in] i_block true: block ops, false: allow ops
*
*/
void block_lpc_ops( bool i_block )
{
// Note: this is ignoring the alt-master because the usecase for
// this function is only applicable for DD1
Singleton<LpcDD>::instance().lock(i_block);
}

}; //namespace LPC

///////////////////////////////////////////////////////////////////////////////
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15 changes: 14 additions & 1 deletion src/usr/lpc/lpcdd.H
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Expand Up @@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
/* Contributors Listed Below - COPYRIGHT 2014,2016 */
/* Contributors Listed Below - COPYRIGHT 2014,2017 */
/* [+] Google Inc. */
/* [+] International Business Machines Corp. */
/* */
Expand Down Expand Up @@ -131,6 +131,19 @@ class LpcDD
iv_lpcBaseAddr = reinterpret_cast<uint64_t>(i_baseLPCAddr);
};

/**
* @brief Block/unblock all LPC operations
* @param[in] i_block true: block ops, false: allow ops
*/
void lock( bool i_block )
{
if( i_block ) {
mutex_lock(ivp_mutex);
} else {
mutex_unlock(ivp_mutex);
}
};

/**
* @brief Constructor
* @param[in] Processor target associated with the ECCB logic
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48 changes: 47 additions & 1 deletion src/usr/xscom/xscom.C
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Expand Up @@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
/* Contributors Listed Below - COPYRIGHT 2011,2016 */
/* Contributors Listed Below - COPYRIGHT 2011,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
Expand Down Expand Up @@ -47,6 +47,7 @@
#include <errl/errludlogregister.H>
#include <xscom/piberror.H>
#include <arch/pirformat.H>
#include <lpc/lpcif.H>

// Trace definition
trace_desc_t* g_trac_xscom = NULL;
Expand Down Expand Up @@ -699,6 +700,38 @@ void collectXscomFFDC(TARGETING::Target* i_target,
}


///////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////
bool checkForLpcBug( void )
{
// See HW400314 for description of hardware bug
// The Power Bus Snooper Interface on the ADU is shared by both PIB
// and LPC. Once an error occurred in the Xscom while accessing the
// PIB space, the interface is overriding the data that is sent out
// as all ?F? for any operation which may be XSCOM to PIB address
// space or to a LPC address Space. Further XSCOM operation are
// locked till the pending error is cleared. But an XSCOM Status
// pmisc is sent with pib response info (in this case the type of
// the error) and for the next operations i.e. XSCOM to PIB or to
// LPC it sends info value as 1 which indicates ADU has pending
// XSCOM Error. This is indicated in the (48 :50) bits in the address
// sent.

ProcessorCoreType l_coreType = cpu_core_type();
uint8_t l_ddLevel = cpu_dd_level();

// Bug is only present in Nimbus DD1
if( (l_coreType == CORE_POWER9_NIMBUS) && (l_ddLevel == 0x10) )
{
TRACFCOMP( g_trac_xscom, "Activating LPC mutex workaround" );
return true;
}
else
{
return false;
}
}

///////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////
errlHndl_t xscomPerformOp(DeviceFW::OperationType i_opType,
Expand Down Expand Up @@ -738,6 +771,13 @@ errlHndl_t xscomPerformOp(DeviceFW::OperationType i_opType,
// Pin this thread to current CPU
task_affinity_pin();

// Block the LPC driver from running while an xscom is in progress
static bool l_hasLpcBug = checkForLpcBug();
if( l_hasLpcBug )
{
LPC::block_lpc_ops(true);
}

// Lock other XSCom in this same thread from running
l_XSComMutex = mmio_xscom_mutex();
mutex_lock(l_XSComMutex);
Expand Down Expand Up @@ -778,6 +818,12 @@ errlHndl_t xscomPerformOp(DeviceFW::OperationType i_opType,
// Unlock
mutex_unlock(l_XSComMutex);

// Unblock the LPC driver
if( l_hasLpcBug )
{
LPC::block_lpc_ops(false);
}

// Done, un-pin
task_affinity_unpin();

Expand Down

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