istepdispatcher: output current istep to LPC port 80h

Adds optional support to output istep progress to LPC I/O port
80h similar to POST codes on x86 BIOS boot process.

Resolves #104

Signed-off-by: Robert Lippert <rlippert@google.com>
Change-Id: I0e2a977863c37d5e6b72a890da9a1516a0a5bf58
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41404
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

src/usr/initservice/istepdispatcher/HBconfig

@@ -13,4 +13,7 @@ config SIO_ISTEP_CONTROL
     help
         Allows istep control via SIO scratch registers.
         Typical usage is via mailbox (scom) scratch registers.
-
+config ISTEP_LPC_PORT80_DEBUG
+    default n
+    help
+        Writes ISTEP progress to LPC port 80h.

src/usr/initservice/istepdispatcher/istepdispatcher.C

@@ -65,6 +65,7 @@
 #include <console/consoleif.H>
 #include <isteps/hwpisteperror.H>
 #include <pnor/pnorif.H>
+#include <lpc/lpcif.H>
 #ifdef CONFIG_BMC_IPMI
 #include <ipmi/ipmiwatchdog.H>      //IPMI watchdog timer
 #include <ipmi/ipmipowerstate.H>    //IPMI System ACPI Power State
@@ -1953,6 +1954,17 @@ errlHndl_t IStepDispatcher::sendProgressCode(bool i_needsLock)
     Util::writeScratchReg( SPLESS::MBOX_SCRATCH_REG5,
                            l_scratch5.data32 );
 
+#ifdef CONFIG_ISTEP_LPC_PORT80_DEBUG
+    // Starting port 80h value for hostboot isteps.  Each step started will
+    // increase the value by one.
+    static uint8_t port80_val = 0x30;
+    static size_t port80_len = sizeof(port80_val);
+    err = deviceWrite(TARGETING::MASTER_PROCESSOR_CHIP_TARGET_SENTINEL,
+                      &port80_val, port80_len,
+                      DEVICE_LPC_ADDRESS(LPC::TRANS_IO, 0x80));
+    delete err; // this is debug only, ignore any errors
+    port80_val++;
+#endif
 
     //--- Display step on serial console
 #ifdef CONFIG_CONSOLE_OUTPUT_PROGRESS