fixed compilation errors when IPLTIME_CHECKSTOP_ANALYSIS is enabled

Not all compile errors have been resolved because occCheckstop.C is not getting built at this time. This config will not be enabled as default until after the IPL support is complete. Change-Id: I9b2892c9bcae1929de2c871a71174a2f27d88d76 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41181 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Caleb N. Palmer <cnpalmer@us.ibm.com> Reviewed-by: Benjamin J. Weisenbeck <bweisenb@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
open-power · Jun 9, 2017 · 9df6390 · 9df6390
1 parent 826713f
commit 9df6390
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Showing 8 changed files with 27 additions and 16 deletions.
diff --git a/src/build/configs/fsprelease.config b/src/build/configs/fsprelease.config
@@ -14,4 +14,5 @@ unset HTMGT
 
 # OpenPower checkstop analysis
 unset ENABLE_CHECKSTOP_ANALYSIS
+unset IPLTIME_CHECKSTOP_ANALYSIS
 
diff --git a/src/include/usr/isteps/pm/occCheckstop.H b/src/include/usr/isteps/pm/occCheckstop.H
@@ -79,7 +79,7 @@ namespace HBOCC
     errlHndl_t loadHostDataToHomer(TARGETING::Target* i_proc,
                                    void* i_occHostDataVirtAddr);
 
-#ifdef CONFIG_IPLTIME_CHECKSTOP_ANALYSIS
+#if defined(CONFIG_IPLTIME_CHECKSTOP_ANALYSIS) && !defined(__HOSTBOOT_RUNTIME)
     /**
      * @brief Sets up OCC Host data in SRAM
      *

diff --git a/src/usr/isteps/istep06/host_start_occ_xstop_handler.C b/src/usr/isteps/istep06/host_start_occ_xstop_handler.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2015,2016                        */
+/* Contributors Listed Below - COPYRIGHT 2015,2017                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -76,7 +76,7 @@ void* host_start_occ_xstop_handler( void *io_pArgs )
                     "MCS target HUID %.8X", l_currMcsHuid);
         } // for
 
-#ifdef CONFIG_IPLTIME_CHECKSTOP_ANALYSIS
+#if defined(CONFIG_IPLTIME_CHECKSTOP_ANALYSIS) && !defined(__HOSTBOOT_RUNTIME)
         // update firdata inputs for OCC
         TARGETING::Target* masterproc = NULL;
         TARGETING::targetService().masterProcChipTargetHandle(masterproc);

diff --git a/src/usr/isteps/istep14/call_mss_memdiag.C b/src/usr/isteps/istep14/call_mss_memdiag.C
@@ -35,6 +35,10 @@
 #include <lib/fir/memdiags_fir.H> // for mss::unmask::after_memdiags
 #include <lib/mc/port.H>          // for mss::reset_reorder_queue_settings
 
+#if defined(CONFIG_IPLTIME_CHECKSTOP_ANALYSIS) && !defined(__HOSTBOOT_RUNTIME)
+  #include <isteps/pm/occCheckstop.H>
+#endif
+
 using   namespace   ISTEP;
 using   namespace   ISTEP_ERROR;
 using   namespace   ERRORLOG;

diff --git a/src/usr/isteps/istep16/call_host_activate_slave_cores.C b/src/usr/isteps/istep16/call_host_activate_slave_cores.C
@@ -233,7 +233,7 @@ void* call_host_activate_slave_cores (void *io_pArgs)
     }
     // @@@@@    END CUSTOM BLOCK:   @@@@@
 
-#ifdef CONFIG_IPLTIME_CHECKSTOP_ANALYSIS
+#if defined(CONFIG_IPLTIME_CHECKSTOP_ANALYSIS) && !defined(__HOSTBOOT_RUNTIME)
     if( l_stepError.isNull() )
     {
         // update firdata inputs for OCC

diff --git a/src/usr/isteps/istep21/call_host_runtime_setup.C b/src/usr/isteps/istep21/call_host_runtime_setup.C
@@ -45,6 +45,11 @@
 
 #include <hbotcompid.H>
 
+#ifdef CONFIG_IPLTIME_CHECKSTOP_ANALYSIS
+  #include <isteps/pm/occAccess.H>
+  #include <isteps/pm/occCheckstop.H>
+#endif
+
 using   namespace   ERRORLOG;
 using   namespace   ISTEP;
 using   namespace   ISTEP_ERROR;
@@ -237,15 +242,19 @@ void* call_host_runtime_setup (void *io_pArgs)
             //0: mainstore, 1: SRAM. We want to use mainstore after this point
 
             //Get master proc
-            TargetService & tS = targetService();
+            TARGETING::TargetService & tS = TARGETING::targetService();
             TARGETING::Target* masterproc = NULL;
             tS.masterProcChipTargetHandle( masterproc );
 
             //Clear (up to and including the IPL flag)
+            size_t sz_data = HBOCC::OCC_OFFSET_IPL_FLAG + 6;
+            size_t sz_dw   = sizeof(uint64_t);
+            uint64_t l_occAppData[(sz_data+(sz_dw-1))/sz_dw];
+            memset( l_occAppData, 0x00, sizeof(l_occAppData) );
+
             const uint32_t l_SramAddrApp = HBOCC::OCC_SRAM_ADDRESS;
-            ecmdDataBufferBase l_occAppData((HBOCC::OCC_OFFSET_IPL_FLAG + 6)
-                                                * 8 /* bits */);
-            l_err = HBOCC::writeSRAM(masterproc, l_SramAddrApp, l_occAppData);
+            l_err = HBOCC::writeSRAM( masterproc, l_SramAddrApp, l_occAppData,
+                                      sz_data );
             if(l_err)
             {
                 TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,

diff --git a/src/usr/isteps/pm/occCheckstop.C b/src/usr/isteps/pm/occCheckstop.C
@@ -306,8 +306,7 @@ namespace HBOCC
 #endif
 
 // @todo RTC 155065 IPL Time Checkstop Analysis Enablement
-#ifdef CONFIG_IPLTIME_CHECKSTOP_ANALYSIS
-#ifndef __HOSTBOOT_RUNTIME
+#if defined(CONFIG_IPLTIME_CHECKSTOP_ANALYSIS) && !defined(__HOSTBOOT_RUNTIME)
     /**
      * @brief Sets up OCC Host data in SRAM
      */
@@ -403,7 +402,6 @@ namespace HBOCC
         return l_errl;
     } // loadHostDataToSRAM
 #endif
-#endif
 
 }  //end HBOCC namespace
 
diff --git a/src/usr/isteps/pm/pm_common.C b/src/usr/isteps/pm/pm_common.C
@@ -655,7 +655,7 @@ namespace HBPM
                 break;
             }
 
-// @todo RTC 155065 IPL Time Checkstop Analysis Enablement
+#if 0 // @todo RTC 155065 IPL Time Checkstop Analysis Enablement
 #ifdef CONFIG_IPLTIME_CHECKSTOP_ANALYSIS
             if (i_useSRAM)
             {
@@ -683,7 +683,7 @@ namespace HBPM
                 }
             }
 #endif
-
+#endif
             l_errl = loadOCCImageToHomer(i_target,
                                          l_occImgPaddr,
                                          l_occImgVaddr,
@@ -703,9 +703,8 @@ namespace HBPM
             void* l_occDataVaddr = reinterpret_cast <void *>(l_occImgVaddr +
                                             HOMER_OFFSET_TO_OCC_HOST_DATA);
 
-// @todo RTC 155065 IPL Time Checkstop Analysis Enablement
-#ifdef CONFIG_IPLTIME_CHECKSTOP_ANALYSIS
-#ifndef __HOSTBOOT_RUNTIME
+#if 0 // @todo RTC 155065 IPL Time Checkstop Analysis Enablement
+#if defined(CONFIG_IPLTIME_CHECKSTOP_ANALYSIS) && !defined(__HOSTBOOT_RUNTIME)
             if (i_useSRAM)
             {
                 //==============================