progASICp4SWITCH

pkt=>=input_arb==selector==>--------==>lookup==>out_next=>

===>=input_arb==selector==>--cross-==>lookup==>out_next=>pkt

===>=input_arb==selector==>---bar--==>lookup==>out_next=>

===>=input_arb==selector==>--------==>lookup==>out_next=>

------------------------------flow table point.v-----------------------------

verilog.v

Name		Name	Last commit message	Last commit date
Latest commit History 94 Commits
mmu		mmu
test		test
1.pcap		1.pcap
2.pcap		2.pcap
3a.txt		3a.txt
AXISdataWidthConverter.v		AXISdataWidthConverter.v
README.md		README.md
c512to8.v		c512to8.v
c8to512.v		c8to512.v
cam.v		cam.v
camtb.v		camtb.v
crossbar.v		crossbar.v
fifo_full.v		fifo_full.v
fifofall.v		fifofall.v
flowtablepoint.v		flowtablepoint.v
input_arb.v		input_arb.v
ipv4_parser.v		ipv4_parser.v
lookup.v		lookup.v
measure.v		measure.v
mmu.v		mmu.v
ndp48.v		ndp48.v
ndpqs.v		ndpqs.v
out_next_point.v		out_next_point.v
pcapparser1gb.v		pcapparser1gb.v
pcapparser1gbtest.v		pcapparser1gbtest.v
selector.v		selector.v
statefull.v		statefull.v
statefulltb.v		statefulltb.v
tcam.v		tcam.v
tcp-4846-connect-disconnect.pcap		tcp-4846-connect-disconnect.pcap
testb.v		testb.v
testbgen.py		testbgen.py

qiaosiyi/progASICp4SWITCH