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[WIP] The ultimate ros amd64 bringup #361

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91c8699
[NTOS:IO] Fix parsing of resource lists
tkreuzer Jan 28, 2018
ff1eaad
[NTOS:MM] Make sure to call MmInitializeProcessAddressSpace() from th…
tkreuzer Jan 29, 2018
15a08e8
[NTOS:MM] In the x64 version of MmCreateProcessAddressSpace() zero ou…
tkreuzer Jan 29, 2018
cce3d16
[NTOS:MM] Fix ViewSize parameter passed to MiInsertVadEx() from MiCre…
tkreuzer Jan 29, 2018
286b2fb
[NTOS:MM] On x64 reserve the address range between FFFF800000000000 a…
tkreuzer Jan 29, 2018
12002d4
[HAL] Fix some 64 bit warnings
tkreuzer Jan 29, 2018
546c05b
[NTOS:OB] Fix some 64 bit warnings
tkreuzer Jan 29, 2018
1bc15af
[CRT] Use chkstk_ms.s on x64 builds
tkreuzer Jan 29, 2018
1f6d61b
[CRT] Remove the x64 asm version of sqrt from build
tkreuzer Jan 29, 2018
9e097de
[NTOS:IO] Fix a warning on MSVC builds
tkreuzer Jan 29, 2018
aedb9f6
[NTOS:MM] SLIST handling for kernel stacks
tkreuzer Feb 4, 2018
d139743
[NTOS:MM] Handle PPEs und PXEs as well in MmInitializeProcessAddressS…
tkreuzer Feb 4, 2018
25064d0
[NTOS:MM] Simplify and fix x64 version of MiGetPteForProcess(), fix M…
tkreuzer Feb 4, 2018
75e11df
[NTOS:MM] Fix session space initialization on x64
tkreuzer Feb 4, 2018
13ef07a
[NTOS:MM] Fix paged pool initialization on x64
tkreuzer Feb 4, 2018
03920b1
[NTOS:MM] Fix paged pool expansion
tkreuzer Feb 4, 2018
235566d
[NTOS:SE] Fix SeSetSecurityDescriptorInfoEx to avoid pool corruption …
tkreuzer Feb 4, 2018
1e326fb
[CMAKE] Add baseaddress_msvc_x64.cmake
tkreuzer Feb 4, 2018
c4fbc15
[CSRSRV] Fix type of ViewSize parameter passed to NtMapViewOfSection
tkreuzer Feb 4, 2018
29db059
[NTOS:KE] Implement KiConvertToGuiThread, KeSwitchKernelStack and sup…
tkreuzer Feb 4, 2018
c24203c
[NTOS:KE] Save and restore previous mode in KiZwSystemService and fix…
tkreuzer Feb 5, 2018
c9d1f6a
[NTOS:KE] Implement KiGetUserModeStackAddress() and KeUserModeCallback()
tkreuzer Feb 5, 2018
e503f53
[HAL][NTOS][I8042PRT] Add some hacks related to resource conflicts
tkreuzer Feb 5, 2018
9335f8f
[NTOS:MM] HACK: comment out an ASSERT that still fails on x64
tkreuzer Feb 5, 2018
4b4a334
[REACTOS] Fix many 64 bit warnings
tkreuzer Feb 6, 2018
945d807
[ENVIRON] Fix x64 build
tkreuzer Feb 6, 2018
a26ae1d
[BOOTLIB] Fix 64 bit warnings
tkreuzer Feb 6, 2018
bd078ab
[NTOS:KE] Improve kernel stack switching on GUI system calls
tkreuzer Feb 6, 2018
7749bdc
Fix indentation
tkreuzer Feb 6, 2018
177b3e7
Addendum to session space stuff
tkreuzer Feb 7, 2018
52721c2
Remove a trailing white space
tkreuzer Feb 7, 2018
fbec870
[NDK] Update x64 version of KEXCEPTION_FRAME
tkreuzer Feb 9, 2018
d5bdd7e
[NTOS:KE] Change the logic of KeSwitchKernelStack and friends to be s…
tkreuzer Feb 9, 2018
4351118
[ASM] Add initial version of kxamd64.inc
tkreuzer Feb 9, 2018
5b1588c
[NDK] Add UCALLOUT_FRAME definition
tkreuzer Feb 10, 2018
1dc22b6
[NTOS:KE] Move KiInitializeUserApc to usercall.c
tkreuzer Feb 10, 2018
8366b2c
[NTOS:KE] Simplify KiInitializeUserApc
tkreuzer Feb 10, 2018
29d20df
[NTOS:KE] Implement x64 version of user callback code
tkreuzer Feb 10, 2018
10e086b
[NDK] Fix the type of KPROCESS::ActiveProcessors
tkreuzer Feb 10, 2018
3252ac3
Silence annoying UNIMPLEMENTED messages
tkreuzer Feb 10, 2018
66eb02c
[NTOS:MM] Remove obsolete x64 debug print
tkreuzer Feb 10, 2018
c93d924
[NTOS:PS] Fix an issue with PROCESS_DEVICEMAP_INFORMATION size on 64…
tkreuzer Feb 10, 2018
c3380ef
[NTDLL] Delete obsolete file amd64/stubs.c
tkreuzer Feb 11, 2018
c249c15
[NTOS:PS] On x64 don't fail in NtSetInformationProcess with ProcessUs…
tkreuzer Feb 11, 2018
8b48097
[WIN32K] Fix ULONG/SIZE_T issue
tkreuzer Feb 11, 2018
e7e7e40
[NTOS:KE] Silence KiRundownThread, it has nothing to do
tkreuzer Feb 11, 2018
a9fc91d
[VIDEOPRT] Don't try to use NtVdmControl on x64
tkreuzer Feb 11, 2018
6e0a3be
[VIDEOPRT] [FORMATTING] No code change
tkreuzer Feb 11, 2018
f062e2d
[VIDEOPRT] Call IntInt10CallBios from VideoPortInt10, instead of code…
tkreuzer Feb 11, 2018
21177bb
[VIDEOPRT] Fixes for x64
tkreuzer Feb 11, 2018
ebe9bc4
[NDK] Add BIOS call API for amd64
tkreuzer Feb 11, 2018
c8bd63f
[FAST486] DWORD -> ULONG, so it can be used in kernel mode
tkreuzer Feb 11, 2018
4c80d83
[HAL] Implement amd64 BIOS call support
tkreuzer Feb 11, 2018
96f3020
[VIDEOPRT] Implement support for INT10 on x64 using the newly impleme…
tkreuzer Feb 11, 2018
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6 changes: 5 additions & 1 deletion CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -267,7 +267,11 @@ else()
if(NO_ROSSYM)
include(sdk/cmake/baseaddress_dwarf.cmake)
elseif(MSVC)
include(sdk/cmake/baseaddress_msvc.cmake)
if (ARCH STREQUAL "amd64")
include(sdk/cmake/baseaddress_msvc_x64.cmake)
else()
include(sdk/cmake/baseaddress_msvc.cmake)
endif()
else()
include(sdk/cmake/baseaddress.cmake)
endif()
Expand Down
2 changes: 1 addition & 1 deletion drivers/input/i8042prt/pnp.c
Original file line number Diff line number Diff line change
Expand Up @@ -507,7 +507,7 @@ i8042PnpStartDevice(
BOOLEAN FoundIrq = FALSE;
ULONG i;
NTSTATUS Status;

__debugbreak();
TRACE_(I8042PRT, "i8042PnpStartDevice(%p)\n", DeviceObject);
DeviceExtension = (PFDO_DEVICE_EXTENSION)DeviceObject->DeviceExtension;
PortDeviceExtension = DeviceExtension->PortDeviceExtension;
Expand Down
3 changes: 2 additions & 1 deletion hal/halx86/CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -57,7 +57,8 @@ if(ARCH STREQUAL "i386")
add_subdirectory(minihal)

# hal
add_hal(hal SOURCES up/halup.rc COMPONENTS generic legacy up pic)
# add_hal(hal SOURCES up/halup.rc COMPONENTS generic legacy up pic)
add_hal(hal SOURCES acpi/halacpi.rc COMPONENTS generic acpi up pic)
add_hal(halacpi SOURCES acpi/halacpi.rc COMPONENTS generic acpi up pic)
add_hal(halapic SOURCES acpi/halacpi.rc COMPONENTS generic legacy up apic)
add_hal(halaacpi SOURCES acpi/halacpi.rc COMPONENTS generic acpi up apic)
Expand Down
8 changes: 4 additions & 4 deletions hal/halx86/acpi/halacpi.c
Original file line number Diff line number Diff line change
Expand Up @@ -975,7 +975,7 @@ HalpBuildAcpiResourceList(IN PIO_RESOURCE_REQUIREMENTS_LIST ResourceList)
ULONG Interrupt;
PAGED_CODE();
ASSERT(ResourceList != NULL);

// __debugbreak();
/* Initialize the list */
ResourceList->BusNumber = -1;
ResourceList->AlternativeLists = 1;
Expand All @@ -994,8 +994,8 @@ HalpBuildAcpiResourceList(IN PIO_RESOURCE_REQUIREMENTS_LIST ResourceList)

/* Get the interrupt number */
Interrupt = HalpPicVectorRedirect[HalpFixedAcpiDescTable.sci_int_vector];
ResourceList->List[0].Descriptors[0].u.Interrupt.MinimumVector = Interrupt;
ResourceList->List[0].Descriptors[0].u.Interrupt.MaximumVector = Interrupt;
ResourceList->List[0].Descriptors[0].u.Interrupt.MinimumVector = Interrupt + PRIMARY_VECTOR_BASE;
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PRIMARY_VECTOR_BASE is the processor's view of the IRQ vector (int 0x30), whereas an IO_RESOURCE_REQUIREMENTS list always refers to raw resources (IRQ 0). So this translation doesn't belong here. Since ROS doesn't have translators & arbiters, I'm not exactly sure where it does belong though :\

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Are there any plans to implement resource translators/arbiters in the near future?

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Not to my knowledge. Regardless, 'here' is not the answer to where it belongs.

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It is a hack that I applied, which ensures that at least HAL is loaded properly and doesn't have any resource conflicts. I have doubts that what you claim about untranslated resources is true, since you can see in the registry on Windows that e.g. "HKEY_LOCAL_MACHINE\HARDWARE\RESOURCEMAP\Hardware Abstraction Layer\ACPI x64 platform.Raw" contains all vectors starting from 0 and ".Translated" contains the same vectors.

ResourceList->List[0].Descriptors[0].u.Interrupt.MaximumVector = Interrupt + PRIMARY_VECTOR_BASE;

/* One more */
++ResourceList->List[0].Count;
Expand All @@ -1013,7 +1013,7 @@ HalpQueryAcpiResourceRequirements(OUT PIO_RESOURCE_REQUIREMENTS_LIST *Requiremen
ULONG Count = 0, ListSize;
NTSTATUS Status;
PAGED_CODE();

//__debugbreak();
/* Get ACPI resources */
HalpAcpiDetectResourceListSize(&Count);
DPRINT("Resource count: %d\n", Count);
Expand Down
12 changes: 6 additions & 6 deletions hal/halx86/generic/dma.c
Original file line number Diff line number Diff line change
Expand Up @@ -152,8 +152,8 @@ HalpInitDma(VOID)
* Check if Extended DMA is available. We're just going to do a random
* read and write.
*/
WRITE_PORT_UCHAR((PUCHAR)FIELD_OFFSET(EISA_CONTROL, DmaController2Pages.Channel2), 0x2A);
if (READ_PORT_UCHAR((PUCHAR)FIELD_OFFSET(EISA_CONTROL, DmaController2Pages.Channel2)) == 0x2A)
WRITE_PORT_UCHAR((PUCHAR)(ULONG_PTR)FIELD_OFFSET(EISA_CONTROL, DmaController2Pages.Channel2), 0x2A);
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I'm a little confused as to why these seem to have no base address, just the FIELD_OFFSET... but you didn't change that. The casts seem fine.

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Dunno, maybe the base address is 0?

if (READ_PORT_UCHAR((PUCHAR)(ULONG_PTR)FIELD_OFFSET(EISA_CONTROL, DmaController2Pages.Channel2)) == 0x2A)
{
DPRINT1("Machine supports EISA DMA. Bus type: %lu\n", HalpBusType);
HalpEisaDma = TRUE;
Expand Down Expand Up @@ -479,11 +479,11 @@ HalpDmaInitializeEisaAdapter(IN PADAPTER_OBJECT AdapterObject,

if (Controller == 1)
{
AdapterBaseVa = (PVOID)FIELD_OFFSET(EISA_CONTROL, DmaController1);
AdapterBaseVa = (PVOID)(ULONG_PTR)FIELD_OFFSET(EISA_CONTROL, DmaController1);
}
else
{
AdapterBaseVa = (PVOID)FIELD_OFFSET(EISA_CONTROL, DmaController2);
AdapterBaseVa = (PVOID)(ULONG_PTR)FIELD_OFFSET(EISA_CONTROL, DmaController2);
}

AdapterObject->AdapterNumber = Controller;
Expand Down Expand Up @@ -517,12 +517,12 @@ HalpDmaInitializeEisaAdapter(IN PADAPTER_OBJECT AdapterObject,

if (Controller == 1)
{
WRITE_PORT_UCHAR((PUCHAR)FIELD_OFFSET(EISA_CONTROL, DmaExtendedMode1),
WRITE_PORT_UCHAR((PUCHAR)(ULONG_PTR)FIELD_OFFSET(EISA_CONTROL, DmaExtendedMode1),
ExtendedMode.Byte);
}
else
{
WRITE_PORT_UCHAR((PUCHAR)FIELD_OFFSET(EISA_CONTROL, DmaExtendedMode2),
WRITE_PORT_UCHAR((PUCHAR)(ULONG_PTR)FIELD_OFFSET(EISA_CONTROL, DmaExtendedMode2),
ExtendedMode.Byte);
}
}
Expand Down
2 changes: 1 addition & 1 deletion hal/halx86/generic/reboot.c
Original file line number Diff line number Diff line change
Expand Up @@ -34,7 +34,7 @@ HalpReboot(VOID)
PHARDWARE_PTE Pte;

/* Get a PTE in the HAL reserved region */
ZeroPageMapping = (PVOID)(0xFFC00000 + PAGE_SIZE);
ZeroPageMapping = UlongToPtr(0xFFC00000 + PAGE_SIZE);
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Would it make sense to create a define for this?

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In fact the code is shitty and not portable, so I replaced it with a call to HalpMapPhysicalMemory64

Pte = GetPteAddress(ZeroPageMapping);

/* Make it valid and map it to the first physical page */
Expand Down
2 changes: 1 addition & 1 deletion hal/halx86/generic/usage.c
Original file line number Diff line number Diff line change
Expand Up @@ -259,7 +259,7 @@ HalpReportResourceUsage(IN PUNICODE_STRING HalName,
ADDRESS_USAGE *CurrentAddress;
LARGE_INTEGER CurrentSortValue, SortValue;
DbgPrint("%wZ Detected\n", HalName);

//__debugbreak();
/* Check if KD is using a COM port */
if (KdComPortInUse)
{
Expand Down
7 changes: 7 additions & 0 deletions ntoskrnl/include/internal/amd64/ke.h
Original file line number Diff line number Diff line change
Expand Up @@ -387,6 +387,13 @@ HalAllocateAdapterChannel(
IN ULONG NumberOfMapRegisters,
IN PDRIVER_CONTROL ExecutionRoutine);

FORCEINLINE
PULONG_PTR
KiGetUserModeStackAddress(void)
{
return &PsGetCurrentThread()->Tcb.TrapFrame->Rsp;
}

#endif /* __NTOSKRNL_INCLUDE_INTERNAL_AMD64_KE_H */

/* EOF */
23 changes: 11 additions & 12 deletions ntoskrnl/include/internal/amd64/mm.h
Original file line number Diff line number Diff line change
Expand Up @@ -20,8 +20,8 @@
#define MI_PAGED_POOL_START (PVOID)0xFFFFF8A000000000ULL // 128 GB paged pool [MiVaPagedPool]
//#define MI_PAGED_POOL_END 0xFFFFF8BFFFFFFFFFULL
//#define MI_SESSION_SPACE_START 0xFFFFF90000000000ULL // 512 GB session space [MiVaSessionSpace]
#define MI_SESSION_VIEW_END 0xFFFFF97FFF000000ULL
#define MI_SESSION_SPACE_END 0xFFFFF97FFFFFFFFFULL
//#define MI_SESSION_VIEW_END 0xFFFFF97FFF000000ULL
#define MI_SESSION_SPACE_END 0xFFFFF98000000000ULL
#define MI_SYSTEM_CACHE_START 0xFFFFF98000000000ULL // 1 TB system cache (on Vista+ this is dynamic VA space) [MiVaSystemCache,MiVaSpecialPoolPaged,MiVaSpecialPoolNonPaged]
#define MI_SYSTEM_CACHE_END 0xFFFFFA7FFFFFFFFFULL
#define MI_PFN_DATABASE 0xFFFFFA8000000000ULL // up to 5.5 TB PFN database followed by non paged pool [MiVaPfnDatabase/MiVaNonPagedPool]
Expand Down Expand Up @@ -54,11 +54,11 @@
#define MI_MIN_INIT_PAGED_POOLSIZE (32 * _1MB)
#define MI_MAX_INIT_NONPAGED_POOL_SIZE (128ULL * 1024 * 1024 * 1024)
#define MI_MAX_NONPAGED_POOL_SIZE (128ULL * 1024 * 1024 * 1024)
#define MI_SYSTEM_VIEW_SIZE (16 * _1MB)
#define MI_SESSION_VIEW_SIZE (20 * _1MB)
#define MI_SESSION_POOL_SIZE (16 * _1MB)
#define MI_SESSION_IMAGE_SIZE (8 * _1MB)
#define MI_SESSION_WORKING_SET_SIZE (4 * _1MB)
#define MI_SYSTEM_VIEW_SIZE (104 * _1MB)
#define MI_SESSION_VIEW_SIZE (104 * _1MB)
#define MI_SESSION_POOL_SIZE (64 * _1MB)
#define MI_SESSION_IMAGE_SIZE (16 * _1MB)
#define MI_SESSION_WORKING_SET_SIZE (16 * _1MB)
#define MI_SESSION_SIZE (MI_SESSION_VIEW_SIZE + \
MI_SESSION_POOL_SIZE + \
MI_SESSION_IMAGE_SIZE + \
Expand Down Expand Up @@ -258,8 +258,6 @@ MI_MAKE_SUBSECTION_PTE(
_Out_ PMMPTE NewPte,
_In_ PVOID Segment)
{
ULONG_PTR Offset;

/* Mark this as a prototype */
NewPte->u.Long = 0;
NewPte->u.Subsect.Prototype = 1;
Expand All @@ -286,9 +284,10 @@ FORCEINLINE
BOOLEAN
MI_IS_MAPPED_PTE(PMMPTE PointerPte)
{
/// FIXME
__debugbreak();
return ((PointerPte->u.Long & 0xFFFFFC01) != 0);
return ((PointerPte->u.Hard.Valid != 0) ||
(PointerPte->u.Proto.Prototype != 0) ||
(PointerPte->u.Trans.Transition != 0) ||
(PointerPte->u.Hard.PageFrameNumber != 0));
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Heh. An old WC of mine says:

    return PointerPte->u.Soft.Valid ||
           PointerPte->u.Soft.Prototype ||
           PointerPte->u.Soft.Transition ||
           PointerPte->u.Soft.UsedPageTableEntries ||
           PointerPte->u.Soft.Reserved ||
           PointerPte->u.Soft.PageFileHigh ||
           PointerPte->u.Transition.PageFrameNumber;

Same thing I suppose

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Should technically be the same. If there is a reason for your variant, I can change it.

}

VOID
Expand Down
7 changes: 7 additions & 0 deletions ntoskrnl/include/internal/ex.h
Original file line number Diff line number Diff line change
Expand Up @@ -1470,3 +1470,10 @@ XIPInit(

#define ExfInterlockedCompareExchange64UL(Destination, Exchange, Comperand) \
(ULONGLONG)ExfInterlockedCompareExchange64((PLONGLONG)(Destination), (PLONGLONG)(Exchange), (PLONGLONG)(Comperand))

__forceinline
SIZE_T
InterlockedCompareExchangeSizeT(PSIZE_T Destination, SIZE_T Exchange, SIZE_T Comperand)
{
return (SIZE_T)InterlockedCompareExchangePointer((PVOID*)Destination, (PVOID)Exchange, (PVOID)Comperand);
}
2 changes: 1 addition & 1 deletion ntoskrnl/io/iomgr/deviface.c
Original file line number Diff line number Diff line change
Expand Up @@ -1427,7 +1427,7 @@ IoSetDeviceInterfaceState(IN PUNICODE_STRING SymbolicLinkName,
}

ASSERT(GuidString.Buffer >= LinkNameNoPrefix.Buffer + 1);
DeviceInstance.Length = (GuidString.Buffer - LinkNameNoPrefix.Buffer - 1) * sizeof(WCHAR);
DeviceInstance.Length = (USHORT)(GuidString.Buffer - LinkNameNoPrefix.Buffer - 1) * sizeof(WCHAR);
if (DeviceInstance.Length == 0)
{
DPRINT1("No device instance in link name '%wZ'\n", SymbolicLinkName);
Expand Down
42 changes: 37 additions & 5 deletions ntoskrnl/io/pnpmgr/pnpres.c
Original file line number Diff line number Diff line change
Expand Up @@ -12,6 +12,16 @@
#define NDEBUG
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https://jira.reactos.org/browse/CORE-10146 contains some info about that resource list parsing problem.

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Yeah, I added another hack to make it work a bit better, but it's still a bug. We need to figure out why these conflicts exist and fix it.

#include <debug.h>

static
ULONG
IopGetDescriptorSize(
PCM_FULL_RESOURCE_DESCRIPTOR ResourceDescriptor)
{
ULONG Count = ResourceDescriptor->PartialResourceList.Count;
return FIELD_OFFSET(CM_FULL_RESOURCE_DESCRIPTOR,
PartialResourceList.PartialDescriptors[Count]);
}

static
BOOLEAN
IopCheckDescriptorForConflict(PCM_PARTIAL_RESOURCE_DESCRIPTOR CmDesc, OPTIONAL PCM_PARTIAL_RESOURCE_DESCRIPTOR ConflictingDescriptor)
Expand Down Expand Up @@ -195,6 +205,9 @@ IopFindInterruptResource(
}
}

DPRINT1("Failed to satisfy interrupt requirement with IRQ 0x%x-0x%x\n",
IoDesc->u.Interrupt.MinimumVector,
IoDesc->u.Interrupt.MaximumVector);
return FALSE;
}

Expand Down Expand Up @@ -542,12 +555,17 @@ IopCheckResourceDescriptor(
IN BOOLEAN Silent,
OUT OPTIONAL PCM_PARTIAL_RESOURCE_DESCRIPTOR ConflictingDescriptor)
{
ULONG i, ii;
ULONG i, ii, DescriptorSize;
BOOLEAN Result = FALSE;
PCM_FULL_RESOURCE_DESCRIPTOR FullDesc;

FullDesc = &ResourceList->List[0];
for (i = 0; i < ResourceList->Count; i++)
{
PCM_PARTIAL_RESOURCE_LIST ResList = &ResourceList->List[i].PartialResourceList;
PCM_PARTIAL_RESOURCE_LIST ResList = &FullDesc->PartialResourceList;
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Doing this correctly broke boot on x86 last I tried. https://jira.reactos.org/browse/CORE-10146

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It still does. Or rather, after hacking hal it boots, but the i8042prt driver doesn't load due to resource conflict. Any help figuring out why that is / fixing it is welcome.

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I noticed a while ago that our acpi.sys doesn't correctly translate the resource info from the ACPI tables either, and suspected that could be part of the problem. I have a patch somewhere that's a start on testing/fixing this, but it's unfinished, as other priorities came up. That was what I'd planned as the next step, though I don't know if it will even fix anything.

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@tkreuzer : about which hack hal?
Can add debugging information to find the cause of the conflict.

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@vgalnt Believe me, when I think some debug print information helps, I either add that, or manually step though the code in WinDbg. The info is all there, it just needs someone to correctly interprete it.

DescriptorSize = IopGetDescriptorSize(FullDesc);
FullDesc = (PCM_FULL_RESOURCE_DESCRIPTOR)((PUCHAR)FullDesc + DescriptorSize);

for (ii = 0; ii < ResList->Count; ii++)
{
PCM_PARTIAL_RESOURCE_DESCRIPTOR ResDesc2 = &ResList->PartialDescriptors[ii];
Expand Down Expand Up @@ -606,6 +624,14 @@ IopCheckResourceDescriptor(
break;

case CmResourceTypeInterrupt:
if (ResDesc->u.Interrupt.Vector == 0xA)
{
//__debugbreak();
DPRINT("Got Interrupt IRQ (0x%x 0x%x vs. 0x%x 0x%x)\n",
ResDesc->u.Interrupt.Vector, ResDesc->u.Interrupt.Level,
ResDesc2->u.Interrupt.Vector, ResDesc2->u.Interrupt.Level);
}

if (ResDesc->u.Interrupt.Vector == ResDesc2->u.Interrupt.Vector)
{
if (!Silent)
Expand Down Expand Up @@ -767,7 +793,7 @@ IopUpdateResourceMap(IN PDEVICE_NODE DeviceNode, PWCHAR Level1Key, PWCHAR Level2
HANDLE PnpMgrLevel1, PnpMgrLevel2, ResourceMapKey;
UNICODE_STRING KeyName;
OBJECT_ATTRIBUTES ObjectAttributes;

//__debugbreak();
RtlInitUnicodeString(&KeyName,
L"\\Registry\\Machine\\HARDWARE\\RESOURCEMAP");
InitializeObjectAttributes(&ObjectAttributes,
Expand Down Expand Up @@ -1097,6 +1123,7 @@ IopAssignDeviceResources(
Status = IopDetectResourceConflict(DeviceNode->ResourceList, FALSE, NULL);
if (!NT_SUCCESS(Status))
{
//__debugbreak();
DPRINT1("Boot resources for %wZ cause a resource conflict!\n", &DeviceNode->InstancePath);
ExFreePool(DeviceNode->ResourceList);
DeviceNode->ResourceList = NULL;
Expand Down Expand Up @@ -1173,12 +1200,17 @@ IopCheckForResourceConflict(
IN BOOLEAN Silent,
OUT OPTIONAL PCM_PARTIAL_RESOURCE_DESCRIPTOR ConflictingDescriptor)
{
ULONG i, ii;
ULONG i, ii, DescriptorSize;
BOOLEAN Result = FALSE;
PCM_FULL_RESOURCE_DESCRIPTOR FullDesc;

FullDesc = &ResourceList1->List[0];
for (i = 0; i < ResourceList1->Count; i++)
{
PCM_PARTIAL_RESOURCE_LIST ResList = &ResourceList1->List[i].PartialResourceList;
PCM_PARTIAL_RESOURCE_LIST ResList = &FullDesc->PartialResourceList;
DescriptorSize = IopGetDescriptorSize(FullDesc);
FullDesc = (PCM_FULL_RESOURCE_DESCRIPTOR)((PUCHAR)FullDesc + DescriptorSize);

for (ii = 0; ii < ResList->Count; ii++)
{
PCM_PARTIAL_RESOURCE_DESCRIPTOR ResDesc = &ResList->PartialDescriptors[ii];
Expand Down