Merge pull request cms-sw#131 from akalinow/36CandBugfix

Bugfix.
swang373 · Jan 26, 2016 · d81ff3e · d81ff3e
2 parents 7c87731 + f6396f5
commit d81ff3e
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Showing 3 changed files with 2 additions and 30 deletions.
diff --git a/L1Trigger/L1TMuonOverlap/interface/OMTFSorter.h b/L1Trigger/L1TMuonOverlap/interface/OMTFSorter.h
@@ -28,11 +28,6 @@ class OMTFSorter{
 			    int charge=0);
 
   ///Sort all processor results.
-  ///First for each region cone find a best candidate using sortRegionResults()
-  ///Then select best candidate amongs found for each logic region
-  l1t::RegionalMuonCand sortProcessor(const std::vector<OMTFProcessor::resultsMap> & procResults,
-						int charge=0);
-  //
   void sortProcessor(const std::vector<OMTFProcessor::resultsMap> & procResults,
 		     l1t::RegionalMuonCandBxCollection & sortedCands,
 		     int bx, int charge=0);

diff --git a/L1Trigger/L1TMuonOverlap/src/OMTFProcessor.cc b/L1Trigger/L1TMuonOverlap/src/OMTFProcessor.cc
@@ -249,7 +249,7 @@ const std::vector<OMTFProcessor::resultsMap> & OMTFProcessor::processInput(unsig
     ///Number of reference hits to be checked. 
     ///Value read from XML configuration
     unsigned int nTestedRefHits = OMTFConfiguration::nTestRefHits;
-    for(unsigned int iRefHit=0;iRefHit<OMTFConfiguration::nRefHits;++iRefHit){
+    for(unsigned int iRefHit=0;iRefHit<OMTFConfiguration::nRefHits;++iRefHit){         
       if(!refHitsBits[iRefHit]) continue;
       if(nTestedRefHits--==0) break;
       const RefHitDef & aRefHitDef = OMTFConfiguration::refHitsDefs[iProcessor][iRefHit];

diff --git a/L1Trigger/L1TMuonOverlap/src/OMTFSorter.cc b/L1Trigger/L1TMuonOverlap/src/OMTFSorter.cc
@@ -191,30 +191,6 @@ void OMTFSorter::sortProcessorResults(const std::vector<OMTFProcessor::resultsMa
 }
 ///////////////////////////////////////////////////////
 ///////////////////////////////////////////////////////
-l1t::RegionalMuonCand OMTFSorter::sortProcessor(const std::vector<OMTFProcessor::resultsMap> & procResults,
-							int charge){ //method kept for backward compatibility
-
-  InternalObj myCand = sortProcessorResults(procResults, charge);
-
-  l1t::RegionalMuonCand candidate;
-  std::bitset<17> bits(myCand.hits);
-  int ipt = myCand.pt+1;
-  if(ipt>31) ipt=31;
-  candidate.setHwPt(RPCConst::ptFromIpt(ipt)*2.0);//MicroGMT has 0.5 GeV pt bins
-  candidate.setHwEta(myCand.eta);//eta scale set during input making in OMTFInputmaker
-  candidate.setHwPhi(myCand.phi);
-  candidate.setHwSign(myCand.charge+1*(myCand.charge<0));
-  candidate.setHwQual(bits.count());
-  std::map<int, int> trackAddr;
-  trackAddr[0] = myCand.hits;
-  trackAddr[1] = myCand.refLayer;
-  trackAddr[2] = myCand.disc;
-  candidate.setTrackAddress(trackAddr);
-
-  return candidate;
-}
-///////////////////////////////////////////////////////
-///////////////////////////////////////////////////////
 bool OMTFSorter::checkHitPatternValidity(unsigned int hits){
 
   std::vector<unsigned int> badPatterns = {99840, 34304, 3075, 36928, 12300, 98816, 98944, 33408, 66688, 66176, 7171, 20528, 33856, 35840, 4156, 34880};
@@ -242,6 +218,7 @@ void OMTFSorter::sortProcessor(const std::vector<OMTFProcessor::resultsMap> & pr
     int ipt = myCand.pt+1;
     if(ipt>31) ipt=31;
     candidate.setHwPt(RPCConst::ptFromIpt(ipt)*2.0 + 1);//MicroGMT has 0.5 GeV step size, with lower bin edge  (uGMT_pt_code - 1)*step_size
+    if(myCand.pt==0)  candidate.setHwPt(0);//Invalid candidate has to be treated separately
     candidate.setHwEta(myCand.eta);//eta scale set during input making in OMTFInputmaker
     candidate.setHwPhi(myCand.phi);
     candidate.setHwSign(1-1*(myCand.charge>0)); //Charge convention for uGMT is charge = (-1)^iCharge