🤖 Automated helper to make the SymbiFlow project run smoother.
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Updated
Jun 20, 2020 - Python
🤖 Automated helper to make the SymbiFlow project run smoother.
Kokoro Configuration to run against SymbiFlow/vtr-verilog-to-routing repository.
Material Design Html Theme for Sphinx customized for SymbiFlow and related hardware projects.
Conda build recipes for the toolchains needed by LiteX / MiSoC firmware
generate C++ reader/writer from XSD schema
An abstraction library for interfacing EDA tools
Tool for automatically testing FPGA designs using a Zynq Series 7 board.
Repository containing common Makefiles for setting up conda environments.
Tool for graphically viewing FPGA bitstream files and their connection to FASM features.
Python library for working Standard Delay Format (SDF) Timing Annotation files.
SymbiFlow WIP changes for Verilog to Routing -- Open Source CAD Flow for FPGA Research
Sphinx Extension which generates various types of diagrams from Verilog code.
Documenting the Xilinx Ultrascale, Ultrascale+ and UltraScale MPSoC series bit-stream format.
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