Adding PCI device scan.

kernel/arch/x86_64/architecture/cpu.d

@@ -183,8 +183,10 @@ public:
 	}
 
 	T ioIn(T)(uint port) {
+		// The argument is passed as RDI 
 		asm {
-			mov EDX, port;
+			naked;
+			mov EDX, EDI;
 		}
 
 		static if (is(T == ubyte) || is(T == byte)) {
@@ -205,6 +207,11 @@ public:
 		else {
 			static assert (false, "Cannot determine data type.");
 		}
+
+		// EAX is the return value, so this is correct
+		asm {
+			ret;
+		}
 	}
 
 	T ioIn(T, char[] port)() {

kernel/arch/x86_64/architecture/pci.d

@@ -9,8 +9,11 @@ module architecture.pci;
 
 import architecture.cpu;
 
-class PCIImplementation {
+import kernel.core.kprintf;
+
+class PCIConfiguration {
 static:
+protected:
 
 	T read(T)(uint address) {
 		synchronized {
@@ -19,6 +22,7 @@ static:
 			// get offset
 			ushort offset = cast(ushort)(address & 0x3);
 
+//			return cast(T)(Cpu.ioIn!(uint)(0xcfc) >> (cast(uint)offset * 8));
 			return Cpu.ioIn!(T)(0xcfc + offset);
 		}
 	}
@@ -38,6 +42,6 @@ private:
 
 	void _setAddress(uint address) {
 		// write out address
-		Cpu.ioOut!(uint, "0xcf8")(address);
+		Cpu.ioOut!(uint, "0xcf8")(address & ~0x3);
 	}
 }

kernel/core/kmain.d

@@ -131,6 +131,9 @@ extern(C) void kmain(int bootLoaderID, void *data) {
 	Log.print("Keyboard: initialize()");
 	Log.result(Keyboard.initialize());
 
+	Log.print("PCI: initialize()");
+	Log.result(PCI.initialize());
+
 	// 7. Schedule
 	Scheduler.initialize();