Optimize crc32 & crc32c on NVIDIA Grace #2204
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krenzland
changed the title
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@Orvid has imported this pull request. If you are a Meta employee, you can view this diff on Phabricator. |
folly/hash/Checksum.cpp
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| @@ -77,6 +77,10 @@ uint32_t crc32_hw( | |||
| } | |||
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| bool crc32c_hw_supported() { | |||
| return crc32_hw_supported_sse42(); | |||
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This has a typo, missing the c after crc32.
Correct name should be crc32c_hw_supported_sse42
| @@ -105,7 +111,35 @@ static uint32_t gf_multiply_crc32_hw(uint64_t crc1, uint64_t crc2, uint32_t) { | |||
| return _mm_cvtsi128_si32(_mm_srli_si128(_mm_xor_si128(res3, res1), 4)); | |||
| } | |||
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| #else | |||
| #elif FOLLY_NEON && FOLLY_ARM_FEATURE_CRC32 && FOLLY_ARM_FEATURE_AES && FOLLY_ARM_FEATURE_SHA2 | |||
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This line is too long.
Can you resubmit after a clang-format?
Sorry, we should have this automated as part of a git hook or something, not sure why we don't have it.
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Okay. Can I suggest to add clang-format to https://github.com/facebook/folly/blob/main/CONTRIBUTING.md?
- Fix typo - Clang format all changed files
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Thanks for the review! I forgot to add that this should be compiled with the flags |
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@Orvid has imported this pull request. If you are a Meta employee, you can view this diff on Phabricator. |
This pull request adds hardware accelerated routines for CRC32 and CRC32C for Arm AARCH64 CPUs. The changes here have been tested on NVIDIA Grace.
In detail, it contains routines for:
gf_multiply_crc32c_hwandgf_multiply_crc32_hwfunctions used in routines to merge partial CRC checksums. These functions are more or less a 1:1 translation of the x86 vectorized routines.This should resolve issue #2027.