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This project is about simulating the single cycle MIPS processor using Matlab and Xilinx tools. Separate files are created for each component in the MIPS processor.

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Abhishek-Sharma94/Single-cycle-MIPS-processor

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README.md

README.md

 
 

alu.v

alu.v

 
 

alu_config.m

alu_config.m

 
 

alucontrol.v

alucontrol.v

 
 

alucontrol_config.m

alucontrol_config.m

 
 

control.v

control.v

 
 

control_config.m

control_config.m

 
 

datamem.v

datamem.v

 
 

datamem_config.m

datamem_config.m

 
 

instrmemo.v

instrmemo.v

 
 

instrmemo_config.m

instrmemo_config.m

 
 

mafile.slx

mafile.slx

 
 

mafile.slx.original.zip

mafile.slx.original.zip

 
 

programcounter.v

programcounter.v

 
 

programcounter_config.m

programcounter_config.m

 
 

registers.v

registers.v

 
 

registers_config.m

registers_config.m

 
 

signextend.v

signextend.v

 
 

signextend_config.m

signextend_config.m

 
 

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Single-cycle-MIPS-processor

This project is about simulating the single cycle MIPS processor using Matlab and Xilinx tools. Seperate files are created for each component in the MIPS processor.

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This project is about simulating the single cycle MIPS processor using Matlab and Xilinx tools. Separate files are created for each component in the MIPS processor.

Topics

computer verilog xilinx-fpga mips-processor architecture-components

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