The code allows anyone with the Artix A7(XC7A35TCSG324-1L) FPGA Board to Blink the On-Board LED for a predefined Frequency. This code needs to be Synthesized and Implemented, which will give a Bitstream that can be loaded onto the FPGA Board.
An XDC (Xilinx Design Constraints) file is a text file used in Xilinx FPGA (Field-Programmable Gate Array) design flows to specify constraints and settings for the design's synthesis, implementation, and timing analysis. XDC files are written in a specific syntax understood by Xilinx design tools, such as Vivado.
XDC files typically contain constraints related to timing, placement, routing, I/O standards, clocking, and other design parameters. These constraints ensure the design meets the desired performance, functionality, and timing requirements when implemented on the FPGA. The XDC file allows the FPGA to understand which port on your Code needs to be mapped with which particular part of the FPGA.
I have included my own Bitstream file in this repository. Give it a try!!