HDLGen-ChatGPT
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HDLGen-ChatGPT
HDLGen-ChatGPT PublicHDLGen-ChatGPT, works in tandem with ChatGPT-3.5 chat interface to enable fast digital systems design and test specification capture, and automatic generation of both VHDL and Verilog models, and t…
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PYNQ-SoC-Builder
PYNQ-SoC-Builder PublicThis project automates process of creating a PYNQ Z2 Overlay in Vivado, generates a custom Juypter Notebook template and uploads to a target PYNQ FPGA.
Repositories
- HDLGen-ChatGPT Public
HDLGen-ChatGPT, works in tandem with ChatGPT-3.5 chat interface to enable fast digital systems design and test specification capture, and automatic generation of both VHDL and Verilog models, and testbenches, and AMD Vivado and Intel Quartus Electronic Design Automation (EDA) project
- PYNQ-SoC-Builder Public
This project automates process of creating a PYNQ Z2 Overlay in Vivado, generates a custom Juypter Notebook template and uploads to a target PYNQ FPGA.
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