This is my private ip repository with different IP cores for my FPGA projects.
| IP core | Description |
|---|---|
| AXIS_Master | AXI-Stream master IP implementation example. |
| AXIS_Slave | AXI-Stream slave IP implementation example. |
| AXIS_Viewer | AXI-Stream data viewer IP implementation example. |
| Debounce | Debounce module for I/O. |
| LCD_Controller | Display controller for HD44780 liquid crystal displays. |
| VGA_Decimate | VGA split module for Xilinx AXI4-Stream to Video Out IP. |