100DaysOfRTL

Toolcahin

• Vivado

Table of content

SL.No	Topic
1	Day_1: RTl Half_Adder
2	Day_2: RTL MUX
3	Day_3: RTL Mod M Counter
4	Day_4: RTL Binary Counter
5	Day_5: RTL D Flip Flop async Reset
6	Day_6: RTL LFSR
7	Day_7: RTL edge Detector Mealy & Moore FSM
8	Day_8: RTL Arithmetic Logic Unit (ALU)
9	Day_9: RTL Single port RAM
10	Day_10: RTL Dual port RAM
11	Day_11: RTL Parallel to Serial(PISO)
12	Day_12: RTL Serial to Parallel(SIPO)