Added signed and unsigned types.

VHDL · May 20, 2023 · 7f24a0a · 7f24a0a
1 parent f9db01c
commit 7f24a0a
Showing 1 changed file with 18 additions and 2 deletions.
diff --git a/pyVHDLModel/IEEE.py b/pyVHDLModel/IEEE.py
@@ -98,13 +98,11 @@ def __init__(self):
 
 		stdLogic = Subtype("std_logic", SimpleSubtypeSymbol(SimpleName("std_ulogic")))
 		stdLogic._baseType = stdULogic
-		# stdLogic._range = Range(IntegerLiteral(0), IntegerLiteral(2**31-1), Direction.To)
 		self._subtypes[stdLogic._normalizedIdentifier] = stdLogic
 		self._declaredItems.append(stdLogic)
 
 		stdLogicVector = Subtype("std_logic_vector", SimpleSubtypeSymbol(SimpleName("std_ulogic_vector")))
 		stdLogicVector._baseType = stdULogicVector
-		# stdLogic._range = Range(IntegerLiteral(0), IntegerLiteral(2**31-1), Direction.To)
 		self._subtypes[stdLogicVector._normalizedIdentifier] = stdLogicVector
 		self._declaredItems.append(stdLogicVector)
 
@@ -165,6 +163,24 @@ def __init__(self):
 		self._AddLibraryClause(("IEEE", ))
 		self._AddPackageClause(("IEEE.std_logic_1164.all", ))
 
+		unresolvedUnsigned = ArrayType("unresolved_unsigned", (SimpleSubtypeSymbol(SimpleName("natural")),), SimpleSubtypeSymbol(SimpleName("std_ulogic")))
+		self._types[unresolvedUnsigned._normalizedIdentifier] = unresolvedUnsigned
+		self._declaredItems.append(unresolvedUnsigned)
+
+		unsigned = Subtype("unsigned", SimpleSubtypeSymbol(SimpleName("unresolved_unsigned")))
+		unsigned._baseType = unresolvedUnsigned
+		self._subtypes[unsigned._normalizedIdentifier] = unsigned
+		self._declaredItems.append(unsigned)
+
+		unresolvedSigned = ArrayType("unresolved_signed", (SimpleSubtypeSymbol(SimpleName("natural")),), SimpleSubtypeSymbol(SimpleName("std_ulogic")))
+		self._types[unresolvedSigned._normalizedIdentifier] = unresolvedSigned
+		self._declaredItems.append(unresolvedSigned)
+
+		signed = Subtype("signed", SimpleSubtypeSymbol(SimpleName("unresolved_signed")))
+		signed._baseType = unresolvedSigned
+		self._subtypes[signed._normalizedIdentifier] = signed
+		self._declaredItems.append(signed)
+
 
 class Numeric_Std_Body(PredefinedPackageBody):
 	pass