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v0.25.0 #71

Merged
merged 11 commits into from
Apr 15, 2023
Merged

v0.25.0 #71

merged 11 commits into from
Apr 15, 2023

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Paebbels
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@Paebbels Paebbels commented Apr 15, 2023

This release reverts changes made to symbols and names in earlier releases. Both features were merged some versions ago, but as shown in #70, a symbol (semantic) can have multiple name styles (syntax).

New Features

None

Changes

  • Reworked Symbol classes to be a separate class structure. (Formerly derived from Name classes).
  • Derived AllName from SelectedName.
  • Updated testcases according to the changes in symbols and names.
  • Reworked some more .format(...) calls to f-strings.
  • Bumped dependencies.

Bug Fixes

None


Related Issues:

@Paebbels Paebbels added the enhancement New feature or request label Apr 15, 2023
@Paebbels Paebbels self-assigned this Apr 15, 2023
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codecov bot commented Apr 15, 2023

Codecov Report

Patch coverage: 73.71% and project coverage change: +0.96 🎉

Comparison is base (93d3b59) 71.22% compared to head (58c1803) 72.18%.

Additional details and impacted files
@@            Coverage Diff             @@
##             main      #71      +/-   ##
==========================================
+ Coverage   71.22%   72.18%   +0.96%     
==========================================
  Files          22       22              
  Lines        3850     3833      -17     
  Branches      873      871       -2     
==========================================
+ Hits         2742     2767      +25     
+ Misses       1049     1006      -43     
- Partials       59       60       +1     
Flag Coverage Δ
unittests 72.18% <73.71%> (+0.96%) ⬆️

Flags with carried forward coverage won't be shown. Click here to find out more.

Impacted Files Coverage Δ
pyVHDLModel/Association.py 70.58% <0.00%> (ø)
pyVHDLModel/Base.py 78.77% <0.00%> (+1.67%) ⬆️
pyVHDLModel/Concurrent.py 55.05% <0.00%> (ø)
pyVHDLModel/Expression.py 77.88% <0.00%> (ø)
pyVHDLModel/Sequential.py 58.51% <0.00%> (ø)
pyVHDLModel/DesignUnit.py 72.19% <37.50%> (+1.49%) ⬆️
pyVHDLModel/__init__.py 76.10% <70.00%> (+0.04%) ⬆️
pyVHDLModel/Name.py 82.79% <81.25%> (+4.77%) ⬆️
pyVHDLModel/STD.py 97.26% <88.88%> (ø)
pyVHDLModel/Symbol.py 94.17% <95.23%> (+8.33%) ⬆️

... and 1 file with indirect coverage changes

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@Paebbels Paebbels merged commit d315d8a into main Apr 15, 2023
31 of 32 checks passed
@Paebbels Paebbels deleted the dev branch April 15, 2023 21:27
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entity_name of an instantiated unit may be a simple name
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