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Digital design project for a simple integer multiplier using Booth's multiplication algorithm made through ASM design method

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adder_8bit.vhd

adder_8bit.vhd

 
 

ashr_17bit.vhd

ashr_17bit.vhd

 
 

cntr_4bit.vhd

cntr_4bit.vhd

 
 

d_Latch.vhd

d_Latch.vhd

 
 

dflipflop.vhd

dflipflop.vhd

 
 

fa_1bit.vhd

fa_1bit.vhd

 
 

fp_multiplier.vhd

fp_multiplier.vhd

 
 

mp_8bit.vhd

mp_8bit.vhd

 
 

mp_8bit_cont.vhd

mp_8bit_cont.vhd

 
 

pulse_detect.vhd

pulse_detect.vhd

 
 

reg_8bit.vhd

reg_8bit.vhd

 
 

xor_2.vhd

xor_2.vhd

 
 

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Digital design project for a simple integer multiplier using Booth's multiplication algorithm made through ASM design method

Topics

vhdl rtl digital-design quartus fpga-programming digital-circuit-design multipliers teroshdl algorithmic-state-machine
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