fpgasystems HACC Platform SGRT

Heterogenous Accelerated Compute Cluster

Under the scope of the AMD University Program, the Heterogeneous Accelerated Compute Clusters (HACCs) is a special initiative to support novel research in adaptive compute acceleration for high-performance computing (HPC). The scope of the program is broad and encompasses systems, architecture, tools, and applications.

HACCs are equipped with the latest Xilinx hardware and software technologies for adaptive compute acceleration research. Each cluster is specially configured to enable some of the world’s foremost academic teams to conduct state-of-the-art HPC research.

Five HACCs have been established at some of world’s most prestigious universities. The first of them was assigned to Prof. Dr. Gustavo Alonso of the Institute for Platform Computing - Systems Group (SG) at the Swiss Federal Institute of Technology Zurich (ETH Zürich) in 2020.

Sections

• Account renewal
• Acknowledgment and citation
• Booking system
• Features
• First steps
• Get started
• Hardware ACCeleration Platform (HACC Platform)
• Infrastructure
• Known limitations
• License
• Operating the cluster
• Playbooks 🔒
• Releases
• Systems Group RunTime (SGRT)
• Technical support
• Usage guidance
• Vocabulary
• Who does what

Releases

Xilinx Tools

Xilinx's tool versioning for ACAP and FPGAs follows XRT’s release schedule. All servers equipped with Alveo or Versal boards (referred to as deployment servers) are associated with a unique Xilinx software version. This includes XRT's Xilinx Board Utility (xbutil), Vivado, Vitis_HLS, and the flashable partitions (or base shell) running on the reconfigurable devices.

Cluster	Release			Base shell
	2021.2	2022.1	2022.2
BUILD	●	●	●
U250	●	●		xilinx_u250_gen3x16_base_4 xilinx_u250_gen3x16_xdma_shell_4_1
U280	○	●		xilinx_u280_gen3x16_xdma_base_1
U50D	○	●	○	xilinx_u50_gen3x16_xdma_base_5
U55C	○	●	○	xilinx_u55c_gen3x16_xdma_base_3
Versal	○	○	●	xilinx_vck5000_gen4x8_qdma_base_2
HACC BOXES	○	○	●	xilinx_u55c_gen3x16_xdma_base_3 xilinx_vck5000_gen4x8_qdma_base_2
○ Existing release.
● Existing release installed on the cluster.

Some deployment servers also feature Vitis installed. Pay attention to the welcome message, as it will indicate the installed tools and their locations.

Installed Xilinx Tools.

HIP and ROCm Tools

For GPU accelerators, HIP and ROCm tools versioning is according to HIP release schedule:

Cluster	HIP Release			ROCm Release
	5.4.1	5.4.3	5.7.1
HACC BOXES			●	Version 1.1
○ Existing release.
● Existing release installed on the cluster.

Usage guidance

When utilizing the HACC, please adhere to the following guidelines:

• Deployment servers: Utilize deployment servers exclusively for testing and verification purposes. Refrain from utilizing them for any software builds. Restrict your usage on these machines to Vitis and HIP runtime.

• Software builds: For software building tasks, utilize the HACC BUILD cluster instead. This machine allows multiple users simultaneous access without requiring booking. Only resort to this node if you lack local access to suitable servers for running builds in your institute.

• Tool installations: Users are only permitted to use preinstalled tools on the system. Avoid installing external tools without prior approval from the HACC manager. If utilizing PYNQ, you may install packages using pip3, ensuring the package is system-wide installed beforehand. For any special requirements, contact research_clusters@amd.com, and we will endeavor to accommodate your needs.

• Lastly, ensure compliance with the Booking rules.

Acknowledgment and citation

We encourage ETHZ-HACC users to acknowledge the support provided by AMD and ETH Zürich for their research in presentations, papers, posters, and press releases. Please use the following acknowledgment statement and citation.

Acknowledgment

This work was supported in part by AMD under the Heterogeneous Accelerated Compute Clusters (HACC) program (formerly known as the XACC program - Xilinx Adaptive Compute Cluster program)

Citation

@misc{moya2023hacc,
  author       = {Javier Moya, Matthias Gabathuler, Mario Ruiz, Gustavo Alonso},
  title        = {fpgasystems/hacc: ETHZ-HACC 2022.1},
  howpublished = {Zenodo},
  year         = {2023},
  month        = sep,
  note         = {\url{https://doi.org/10.5281/zenodo.8344513}},
  doi          = {10.5281/zenodo.8340448}
}

Download

To get a printed copy of the cited resource, please follow this link.

License

Copyright (c) 2022 FPGA @ Systems Group, ETH Zurich

Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:

The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.