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Expose source location to ghdlsynth #898

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pepijndevos
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Adds a Get_Source utility function needed for ghdl/ghdl-yosys-plugin#35

@tgingold
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You don't need to re-allocate the string. I will fix that.

@tgingold
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Labels are now set on assert/assume gates. So maybe the message is already better.

@pepijndevos
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Assert failed in alu: op_or yea that's useful. Actually better than showing a line number. Thanks!

Regardless, I think this is still a useful change. Including fixing our instance naming convention to match Verilog, if possible. But that's a separate issue.

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Yes, I still plan to add locations.

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2 participants