-
Lund University
- Sweden
Block or Report
Block or report ilaydayaman
Report abuse
Contact GitHub support about this user’s behavior. Learn more about reporting abuse.
Report abusePinned
-
-
CNN_for_SLR
CNN_for_SLR PublicA trained Convolutional Neural Network implemented on ZedBoard Zynq-7000 FPGA.
-
Pipelined-FFT-with-SDF-and-CORDIC
Pipelined-FFT-with-SDF-and-CORDIC PublicA Pipelined Radix-2 FFT with SDF Architecture for 2048 Points with the CORDIC Algorithm in the first stage and dedicated multipliers in the 9th and 10th stages
VHDL 7
-
PicoTETRIS
PicoTETRIS PublicForked from gonultasbu/PicoTETRIS
Tetris game written for PicoBlaze softprocessor that runs on a Spartan 3E FPGA, VGA interface written with Verilog.
Verilog 2
Something went wrong, please refresh the page to try again.
If the problem persists, check the GitHub status page or contact support.
If the problem persists, check the GitHub status page or contact support.