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Jun 9, 2024 - VHDL
quartus-prime
Here are 100 public repositories matching this topic...
Script to build the bootloader (u-boot) and bring all components to a bootable image for Intel (ALTERA) SoC-FPGAs
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Jun 4, 2024 - Python
This repository contains numerous projects that were successfully implemented on an Altera Cyclone IV FPGA.
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May 31, 2024 - C
UART Transmitter and Receiver implementation for FPGA
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May 6, 2024 - SystemVerilog
Max Destil's Advanced VLSI Design course project portfolio. See link for course description.
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Apr 22, 2024 - MATLAB
Install Intel FPGA 'Quartus Prime' software on remote servers
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Mar 22, 2024 - Python
PongFPGA: Experience the classic Pong game reimagined with FPGA tech! 🕹️ Dive into the world of hardware programming for thrilling entertainment and education! 🚀🎮
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Feb 21, 2024 - Tcl
This project was made for optional fpga project during F23 Computer Architecture course. This is Quartus Project for turning fpga board into morse coder.
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Jan 11, 2024 - HTML
An embedded system project of an audio player made using Altera Max 10 FPGA, Quartus Prime & NIOS II
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Jan 7, 2024 - C
Welcome to the BitBlaster_10bit_Processor! Our custom-designed 10-bit processor, crafted meticulously as part of a project for a Digital Logic Design course at South Dakota State University.
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Dec 8, 2023 - SystemVerilog
Collection of VHDL lab projects for my 1B semester ECE124 course at the University of Waterloo.
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Dec 8, 2023 - VHDL
CPR E 381 Project: Three MIPS Processor Designs - VHDL and Waveform Simulations
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Nov 28, 2023 - Python
My implementation of CD54HC194 shift register.
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Nov 27, 2023 - VHDL
Исходные коды к главам книги "Цифровой синтез: практический курс" (под ред. А.Ю. Романова и Ю.В. Панчула)
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Sep 15, 2023 - Verilog
Code Converter using negative logic in order to minimize the number of gates. Done using Intel Quartus Prime Software
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Jul 8, 2023
Multiplayer tank game implemented on the DE1-SoC Cyclone V FPGA. Based on Battle City for the NES, runs with 2 controllers, uses VGA for video and the WM8731 CODEC for audio.
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May 13, 2023 - C
An attempt at making a customised RISC processor with five pipelined stages and supporting all RISC-V instruction set
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May 13, 2023 - SystemVerilog
CAD for automatically configuring FPGA "Marsohod"
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May 1, 2023 - Verilog
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