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techpack: data: Merge tag 'LA.UM.8.11.r1-01900-NICOBAR.0' into neutri…
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…no-msm-hotdogb-4.14

"LA.UM.8.11.r1-01900-NICOBAR.0"

* tag 'LA.UM.8.11.r1-01900-NICOBAR.0':
  rmnet_shs: add userspace flow movement and slow start support
  emac: Perf setting
  drivers: rmnet_perf: Check for over pulling
  drivers: shs: Change allocation context of shs allocations within spin_lock
  data-kernel: Micrel WOL & phy intr
  drivers: shs: fix null check before freeing slow start list
  drivers: shs: fix deadlock caused between generic netlink and rtnl locks
  drivers: shs: limit size copied to cached flows array to avoid globar var corruption
  data-kernel: Add io macro settings for emac core version 2.1.1
  data-kernel: rmnet: shs: Fix Errors Reported during Static Analysis.
  drivers: perf: Register/unregister on perf
  drivers: shs: Protect all file system operations using shs ep lock
  drivers: shs: Fix potential null dereference on page alloc failure
  data-kernel: EMAC: emac cleanp

Signed-off-by: Adam W. Willis <return.of.octobot@gmail.com>

Conflicts:
	techpack/data/drivers/rmnet/shs/Kbuild
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0ctobot committed Dec 27, 2019
2 parents 6e3154c + 5cb0ace commit d98d038
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Showing 21 changed files with 2,110 additions and 89 deletions.
9 changes: 9 additions & 0 deletions techpack/data/drivers/emac-dwc-eqos/Android.mk
Expand Up @@ -22,6 +22,15 @@ KBUILD_OPTIONS += DCONFIG_DEBUGFS_OBJ=1
LOCAL_MODULE := emac_dwc_eqos.ko
LOCAL_MODULE_TAGS := optional
include $(DLKM_DIR)/AndroidKernelModule.mk

include $(CLEAR_VARS)
LOCAL_MODULE := emac_perf_settings.sh
LOCAL_MODULE_TAGS := optional
LOCAL_MODULE_CLASS := ETC
LOCAL_MODULE_PATH := $(TARGET_OUT_DATA)/emac
LOCAL_SRC_FILES := emac_perf_settings.sh
include $(BUILD_PREBUILT)

endif
endif

Expand Down
4 changes: 4 additions & 0 deletions techpack/data/drivers/emac-dwc-eqos/DWC_ETH_QOS_drv.c
Expand Up @@ -795,6 +795,10 @@ void DWC_ETH_QOS_handle_phy_interrupt(struct DWC_ETH_QOS_prv_data *pdata)
EMACDBG(
"MICREL PHY Intr EN Reg (%#x) = %#x\n", DWC_ETH_QOS_MICREL_PHY_INTCS, micrel_intr_status);

/* Call ack interrupt to clear the WOL interrupt status fields */
if (pdata->phydev->drv->ack_interrupt)
pdata->phydev->drv->ack_interrupt(pdata->phydev);

/* Interrupt received for link state change */
if (phy_intr_status & LINK_STATE_MASK) {
EMACDBG("Interrupt received for link UP state\n");
Expand Down
19 changes: 12 additions & 7 deletions techpack/data/drivers/emac-dwc-eqos/DWC_ETH_QOS_mdio.c
Expand Up @@ -543,7 +543,8 @@ static void set_phy_rx_tx_delay(struct DWC_ETH_QOS_prv_data *pdata,
EMACDBG("Read 0x%x from offset 0x8\n",phydata);
phydata = 0;

if (pdata->emac_hw_version_type == EMAC_HW_v2_1_2) {
if (pdata->emac_hw_version_type == EMAC_HW_v2_1_2
|| pdata->emac_hw_version_type == EMAC_HW_v2_1_1) {
u16 tx_clk = 0xE;
/* Provide TX_CLK delay of -0.06nsec */
DWC_ETH_QOS_mdio_mmd_register_read_direct(pdata, pdata->phyaddr,
Expand All @@ -562,7 +563,8 @@ static void set_phy_rx_tx_delay(struct DWC_ETH_QOS_prv_data *pdata,
DWC_ETH_QOS_mdio_mmd_register_read_direct(pdata, pdata->phyaddr,
DWC_ETH_QOS_MICREL_PHY_DEBUG_MMD_DEV_ADDR,0x5,&phydata);
phydata &= ~(0xFF);
if (pdata->emac_hw_version_type == EMAC_HW_v2_1_2)
if (pdata->emac_hw_version_type == EMAC_HW_v2_1_2 ||
pdata->emac_hw_version_type == EMAC_HW_v2_1_1)
phydata |= ((0x2 << 12) | (0x2 << 8) | (0x2 << 4) | 0x2);
else
/* Default settings for EMAC_HW_v2_1_0 */
Expand All @@ -579,7 +581,8 @@ static void set_phy_rx_tx_delay(struct DWC_ETH_QOS_prv_data *pdata,
DWC_ETH_QOS_mdio_mmd_register_read_direct(pdata, pdata->phyaddr,
DWC_ETH_QOS_MICREL_PHY_DEBUG_MMD_DEV_ADDR,0x4,&phydata);
phydata &= ~(0xF << 4);
if (pdata->emac_hw_version_type == EMAC_HW_v2_1_2)
if (pdata->emac_hw_version_type == EMAC_HW_v2_1_2 ||
pdata->emac_hw_version_type == EMAC_HW_v2_1_1)
phydata |= (0x2 << 4);
else
/* Default settings for EMAC_HW_v2_1_0 */
Expand Down Expand Up @@ -654,9 +657,10 @@ static void configure_phy_rx_tx_delay(struct DWC_ETH_QOS_prv_data *pdata)
set_phy_rx_tx_delay(pdata, ENABLE_RX_DELAY, ENABLE_TX_DELAY);
} else {
/* Settings for RGMII ID mode.
Not applicable for EMAC core version 2.1.0 and 2.1.2 */
Not applicable for EMAC core version 2.1.0, 2.1.2 and 2.1.1 */
if (pdata->emac_hw_version_type != EMAC_HW_v2_1_0 &&
pdata->emac_hw_version_type != EMAC_HW_v2_1_2)
pdata->emac_hw_version_type != EMAC_HW_v2_1_2 &&
pdata->emac_hw_version_type != EMAC_HW_v2_1_1)
set_phy_rx_tx_delay(pdata, DISABLE_RX_DELAY, DISABLE_TX_DELAY);
}
break;
Expand All @@ -675,9 +679,10 @@ static void configure_phy_rx_tx_delay(struct DWC_ETH_QOS_prv_data *pdata)
set_phy_rx_tx_delay(pdata, DISABLE_RX_DELAY, ENABLE_TX_DELAY);
} else {
/* Settings for RGMII ID mode */
/* Not applicable for EMAC core version 2.1.0 and 2.1.2 */
/* Not applicable for EMAC core version 2.1.0, 2.1.2 and 2.1.1 */
if (pdata->emac_hw_version_type != EMAC_HW_v2_1_0 &&
pdata->emac_hw_version_type != EMAC_HW_v2_1_2)
pdata->emac_hw_version_type != EMAC_HW_v2_1_2 &&
pdata->emac_hw_version_type != EMAC_HW_v2_1_1)
set_phy_rx_tx_delay(pdata, DISABLE_RX_DELAY, DISABLE_TX_DELAY);
}
}
Expand Down
17 changes: 13 additions & 4 deletions techpack/data/drivers/emac-dwc-eqos/DWC_ETH_QOS_platform.c
Expand Up @@ -1037,8 +1037,9 @@ int DWC_ETH_QOS_enable_ptp_clk(struct device *dev)
int ret;
const char* ptp_clock_name;

if (dwc_eth_qos_res_data.emac_hw_version_type == EMAC_HW_v2_1_0 ||
dwc_eth_qos_res_data.emac_hw_version_type == EMAC_HW_v2_1_2)
if (dwc_eth_qos_res_data.emac_hw_version_type == EMAC_HW_v2_1_0
|| dwc_eth_qos_res_data.emac_hw_version_type == EMAC_HW_v2_1_2
|| dwc_eth_qos_res_data.emac_hw_version_type == EMAC_HW_v2_1_1)
ptp_clock_name = "emac_ptp_clk";
else
ptp_clock_name = "eth_ptp_clk";
Expand Down Expand Up @@ -1186,8 +1187,9 @@ static int DWC_ETH_QOS_get_clks(struct device *dev)
dwc_eth_qos_res_data.rgmii_clk = NULL;
dwc_eth_qos_res_data.ptp_clk = NULL;

if (dwc_eth_qos_res_data.emac_hw_version_type == EMAC_HW_v2_1_0 ||
(dwc_eth_qos_res_data.emac_hw_version_type == EMAC_HW_v2_1_2)) {
if (dwc_eth_qos_res_data.emac_hw_version_type == EMAC_HW_v2_1_0
|| dwc_eth_qos_res_data.emac_hw_version_type == EMAC_HW_v2_1_2
|| dwc_eth_qos_res_data.emac_hw_version_type == EMAC_HW_v2_1_1) {
/* EMAC core version 2.1.0 clocks */
axi_clock_name = "emac_axi_clk";
ahb_clock_name = "emac_slv_ahb_clk";
Expand Down Expand Up @@ -2262,6 +2264,13 @@ int DWC_ETH_QOS_remove(struct platform_device *pdev)
static void DWC_ETH_QOS_shutdown(struct platform_device *pdev)
{
pr_info("qcom-emac-dwc-eqos: DWC_ETH_QOS_shutdown\n");
#ifdef DWC_ETH_QOS_BUILTIN
if (gDWC_ETH_QOS_prv_data->dev->flags & IFF_UP) {
gDWC_ETH_QOS_prv_data->dev->netdev_ops->ndo_stop(gDWC_ETH_QOS_prv_data->dev);
gDWC_ETH_QOS_prv_data->dev->flags &= ~IFF_UP;
}
DWC_ETH_QOS_remove(pdev);
#endif
}

#ifdef CONFIG_PM
Expand Down
23 changes: 16 additions & 7 deletions techpack/data/drivers/emac-dwc-eqos/DWC_ETH_QOS_rgmii_io_macro.c
Expand Up @@ -364,7 +364,8 @@ int DWC_ETH_QOS_rgmii_io_macro_init(struct DWC_ETH_QOS_prv_data *pdata)
uint rgmii_data_divide_clk;
ULONG data;

if (pdata->emac_hw_version_type == EMAC_HW_v2_3_0 || (pdata->emac_hw_version_type == EMAC_HW_v2_3_1)) {
if (pdata->emac_hw_version_type == EMAC_HW_v2_3_0 || (pdata->emac_hw_version_type == EMAC_HW_v2_3_1)
|| (pdata->emac_hw_version_type == EMAC_HW_v2_1_1)) {
if(pdata->io_macro_phy_intf == RGMII_MODE)
loopback_mode_en = 0x1;
rgmii_data_divide_clk = 0x0;
Expand Down Expand Up @@ -403,7 +404,8 @@ int DWC_ETH_QOS_rgmii_io_macro_init(struct DWC_ETH_QOS_prv_data *pdata)
RGMII_LOOPBACK_EN_UDFWR(loopback_mode_en);
if (pdata->emac_hw_version_type == EMAC_HW_v2_1_0 ||
pdata->emac_hw_version_type == EMAC_HW_v2_1_2 ||
(pdata->emac_hw_version_type == EMAC_HW_v2_3_1))
(pdata->emac_hw_version_type == EMAC_HW_v2_3_1) ||
pdata->emac_hw_version_type == EMAC_HW_v2_1_1)
RGMII_CONFIG_2_TX_CLK_PHASE_SHIFT_EN_UDFWR(0x1);
} else {
/* Enable DDR mode*/
Expand All @@ -429,6 +431,8 @@ int DWC_ETH_QOS_rgmii_io_macro_init(struct DWC_ETH_QOS_prv_data *pdata)
SDCC_HC_PRG_RCLK_DLY_UDFWR(52);
else if (pdata->emac_hw_version_type == EMAC_HW_v2_3_1)
SDCC_HC_PRG_RCLK_DLY_UDFWR(104);
else if (pdata->emac_hw_version_type == EMAC_HW_v2_1_1)
SDCC_HC_PRG_RCLK_DLY_UDFWR(130);
else { /* Program PRG_RCLK_DLY to 57 for a required delay of 1.8 ns */
SDCC_HC_PRG_RCLK_DLY_UDFWR(57);
}
Expand Down Expand Up @@ -459,9 +463,11 @@ int DWC_ETH_QOS_rgmii_io_macro_init(struct DWC_ETH_QOS_prv_data *pdata)
RGMII_LOOPBACK_EN_UDFWR(loopback_mode_en);
if (pdata->emac_hw_version_type == EMAC_HW_v2_1_0 ||
pdata->emac_hw_version_type == EMAC_HW_v2_1_2 ||
(pdata->emac_hw_version_type == EMAC_HW_v2_3_1))
(pdata->emac_hw_version_type == EMAC_HW_v2_3_1) ||
pdata->emac_hw_version_type == EMAC_HW_v2_1_1)
RGMII_CONFIG_2_RX_PROG_SWAP_UDFWR(0x1);
if (pdata->emac_hw_version_type == EMAC_HW_v2_1_2)
if (pdata->emac_hw_version_type == EMAC_HW_v2_1_2 ||
pdata->emac_hw_version_type == EMAC_HW_v2_1_1)
RGMII_CONFIG_2_TX_CLK_PHASE_SHIFT_EN_UDFWR(0x1);
} else{
RGMII_DDR_MODE_UDFWR(0x1);
Expand Down Expand Up @@ -506,9 +512,11 @@ int DWC_ETH_QOS_rgmii_io_macro_init(struct DWC_ETH_QOS_prv_data *pdata)
RGMII_LOOPBACK_EN_UDFWR(loopback_mode_en);
if (pdata->emac_hw_version_type == EMAC_HW_v2_1_0 ||
pdata->emac_hw_version_type == EMAC_HW_v2_1_2 ||
(pdata->emac_hw_version_type == EMAC_HW_v2_3_1))
(pdata->emac_hw_version_type == EMAC_HW_v2_3_1) ||
pdata->emac_hw_version_type == EMAC_HW_v2_1_1)
RGMII_CONFIG_2_RX_PROG_SWAP_UDFWR(0x1);
if (pdata->emac_hw_version_type == EMAC_HW_v2_1_2)
if (pdata->emac_hw_version_type == EMAC_HW_v2_1_2 ||
pdata->emac_hw_version_type == EMAC_HW_v2_1_1)
RGMII_CONFIG_2_TX_CLK_PHASE_SHIFT_EN_UDFWR(0x1);
} else{
RGMII_DDR_MODE_UDFWR(0x1);
Expand Down Expand Up @@ -570,7 +578,8 @@ int DWC_ETH_QOS_rgmii_io_macro_init(struct DWC_ETH_QOS_prv_data *pdata)
RGMII_CONFIG_2_DATA_DIVIDE_CLK_SEL_UDFWR(0x1);
RGMII_CONFIG_2_TX_CLK_PHASE_SHIFT_EN_UDFWR(0x0);
RGMII_CONFIG_2_RERVED_CONFIG_16_EN_UDFWR(0x1);
if (pdata->emac_hw_version_type == EMAC_HW_v2_1_2)
if (pdata->emac_hw_version_type == EMAC_HW_v2_1_2 ||
pdata->emac_hw_version_type == EMAC_HW_v2_1_1)
RGMII_CONFIG_2_TX_CLK_PHASE_SHIFT_EN_UDFWR(0x1);
if (pdata->emac_hw_version_type == EMAC_HW_v2_3_1)
RGMII_LOOPBACK_EN_UDFWR(0x1);
Expand Down
22 changes: 22 additions & 0 deletions techpack/data/drivers/emac-dwc-eqos/emac_perf_settings.sh
@@ -0,0 +1,22 @@
#!/vendor/bin/sh
#Copyright (c) 2019, The Linux Foundation. All rights reserved.
#
#This program is free software; you can redistribute it and/or modify
#it under the terms of the GNU General Public License version 2 and
#only version 2 as published by the Free Software Foundation.
#
#This program is distributed in the hope that it will be useful,
#but WITHOUT ANY WARRANTY; without even the implied warranty of
#MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
#GNU General Public License for more details.
#
#
echo 12582912 > /proc/sys/net/core/wmem_max;
echo 12582912 > /proc/sys/net/core/rmem_max;
echo 10240 87380 12582912 > /proc/sys/net/ipv4/tcp_rmem;
echo 10240 87380 12582912 > /proc/sys/net/ipv4/tcp_wmem;
echo 12582912 > /proc/sys/net/ipv4/udp_rmem_min;
echo 12582912 > /proc/sys/net/ipv4/udp_wmem_min;
echo 1 > /proc/sys/net/ipv4/tcp_window_scaling;
echo 18 > /sys/class/net/eth0/queues/rx-0/rps_cpus;

7 changes: 5 additions & 2 deletions techpack/data/drivers/rmnet/perf/rmnet_perf_config.c
Expand Up @@ -397,7 +397,9 @@ static int rmnet_perf_config_notify_cb(struct notifier_block *nb,

switch (event) {
case NETDEV_UNREGISTER:
if (rmnet_is_real_dev_registered(dev) &&
pr_info("%s(): rmnet_perf netdevice unregister, name = %s\n",
__func__, dev->name);
if (perf && rmnet_is_real_dev_registered(dev) &&
rmnet_perf_config_hook_registered() &&
(!strncmp(dev->name, "rmnet_ipa0", 10) ||
!strncmp(dev->name, "rmnet_mhi0", 10))) {
Expand All @@ -413,6 +415,7 @@ static int rmnet_perf_config_notify_cb(struct notifier_block *nb,
RCU_INIT_POINTER(rmnet_perf_deag_entry, NULL);
RCU_INIT_POINTER(rmnet_perf_desc_entry, NULL);
RCU_INIT_POINTER(rmnet_perf_chain_end, NULL);
perf = NULL;
}
break;
case NETDEV_REGISTER:
Expand All @@ -421,7 +424,7 @@ static int rmnet_perf_config_notify_cb(struct notifier_block *nb,
/* Check prevents us from allocating resources for every
* interface
*/
if (!rmnet_perf_config_hook_registered() &&
if (!perf && !rmnet_perf_config_hook_registered() &&
strncmp(dev->name, "rmnet_data", 10) == 0) {
struct rmnet_priv *priv = netdev_priv(dev);

Expand Down
10 changes: 6 additions & 4 deletions techpack/data/drivers/rmnet/perf/rmnet_perf_opt.c
Expand Up @@ -318,10 +318,12 @@ rmnet_perf_opt_add_flow_subfrags(struct rmnet_perf_opt_flow_node *flow_node)

new_frag = pkt_list[i].frag_desc;
/* Pull headers if they're there */
if (new_frag->hdr_ptr == rmnet_frag_data_ptr(new_frag))
rmnet_frag_pull(new_frag, perf->rmnet_port,
flow_node->ip_len +
flow_node->trans_len);
if (new_frag->hdr_ptr == rmnet_frag_data_ptr(new_frag)) {
if (!rmnet_frag_pull(new_frag, perf->rmnet_port,
flow_node->ip_len +
flow_node->trans_len))
continue;
}

/* Move the fragment onto the subfrags list */
list_move_tail(&new_frag->list, &head_frag->sub_frags);
Expand Down
2 changes: 1 addition & 1 deletion techpack/data/drivers/rmnet/shs/Android.mk
Expand Up @@ -14,7 +14,7 @@ LOCAL_CLANG :=true
LOCAL_MODULE_PATH := $(KERNEL_MODULES_OUT)
LOCAL_MODULE := rmnet_shs.ko

LOCAL_SRC_FILES := rmnet_shs_main.c rmnet_shs_config.c rmnet_shs_wq.c rmnet_shs_freq.c
LOCAL_SRC_FILES := rmnet_shs_main.c rmnet_shs_config.c rmnet_shs_wq.c rmnet_shs_freq.c rmnet_shs_wq_mem.c rmnet_shs_wq_genl.c

RMNET_SHS_BLD_DIR := ../../vendor/qcom/opensource/data-kernel/drivers/rmnet/shs
DLKM_DIR := ./device/qcom/common/dlkm
Expand Down
2 changes: 1 addition & 1 deletion techpack/data/drivers/rmnet/shs/Kbuild
@@ -1,2 +1,2 @@
obj-$(CONFIG_RMNET_SHS) += rmnet_shs.o
rmnet_shs-y := rmnet_shs_config.o rmnet_shs_main.o rmnet_shs_wq.o rmnet_shs_freq.o
rmnet_shs-y := rmnet_shs_config.o rmnet_shs_main.o rmnet_shs_wq.o rmnet_shs_freq.o rmnet_shs_wq_mem.o rmnet_shs_wq_genl.o
19 changes: 11 additions & 8 deletions techpack/data/drivers/rmnet/shs/rmnet_shs.h
Expand Up @@ -54,14 +54,14 @@
//#define RMNET_SHS_UDP_PPS_SILVER_CORE_UPPER_THRESH 90000
//#define RMNET_SHS_TCP_PPS_SILVER_CORE_UPPER_THRESH 90000

#define SHS_TRACE_ERR(...) if (rmnet_shs_debug) \
trace_rmnet_shs_err(__VA_ARGS__)
#define SHS_TRACE_ERR(...) \
do { if (rmnet_shs_debug) trace_rmnet_shs_err(__VA_ARGS__); } while (0)

#define SHS_TRACE_HIGH(...) if (rmnet_shs_debug) \
trace_rmnet_shs_high(__VA_ARGS__)
#define SHS_TRACE_HIGH(...) \
do { if (rmnet_shs_debug) trace_rmnet_shs_high(__VA_ARGS__); } while (0)

#define SHS_TRACE_LOW(...) if (rmnet_shs_debug) \
trace_rmnet_shs_low(__VA_ARGS__)
#define SHS_TRACE_LOW(...) \
do { if (rmnet_shs_debug) trace_rmnet_shs_low(__VA_ARGS__); } while (0)

#define RMNET_SHS_MAX_SILVER_CORE_BURST_CAPACITY 204800

Expand All @@ -77,6 +77,9 @@
#define RMNET_SHS_UDP_PPS_PERF_CPU_LTHRESH 40000
#define RMNET_SHS_TCP_PPS_PERF_CPU_LTHRESH (40000*RMNET_SHS_TCP_COALESCING_RATIO)

#define RMNET_SHS_UDP_PPS_HEADROOM 20000
#define RMNET_SHS_GOLD_BALANCING_THRESH (RMNET_SHS_UDP_PPS_PERF_CPU_UTHRESH / 2)

struct core_flush_s {
struct hrtimer core_timer;
struct work_struct work;
Expand All @@ -92,8 +95,8 @@ struct rmnet_shs_cfg_s {
struct rmnet_port *port;
struct core_flush_s core_flush[MAX_CPUS];
u64 core_skbs[MAX_CPUS];
long int num_bytes_parked;
long int num_pkts_parked;
long num_bytes_parked;
long num_pkts_parked;
u32 is_reg_dl_mrk_ind;
u16 num_flows;
u8 is_pkt_parked;
Expand Down
11 changes: 10 additions & 1 deletion techpack/data/drivers/rmnet/shs/rmnet_shs_config.c
Expand Up @@ -20,6 +20,7 @@
#include "rmnet_shs_config.h"
#include "rmnet_shs.h"
#include "rmnet_shs_wq.h"
#include "rmnet_shs_wq_genl.h"

MODULE_LICENSE("GPL v2");

Expand All @@ -32,7 +33,7 @@ unsigned int rmnet_shs_stats_enabled __read_mostly = 1;
module_param(rmnet_shs_stats_enabled, uint, 0644);
MODULE_PARM_DESC(rmnet_shs_stats_enabled, "Enable Disable stats collection");

unsigned long int rmnet_shs_crit_err[RMNET_SHS_CRIT_ERR_MAX];
unsigned long rmnet_shs_crit_err[RMNET_SHS_CRIT_ERR_MAX];
module_param_array(rmnet_shs_crit_err, ulong, 0, 0444);
MODULE_PARM_DESC(rmnet_shs_crit_err, "rmnet shs crtical error type");

Expand All @@ -51,6 +52,11 @@ int __init rmnet_shs_module_init(void)
pr_info("%s(): Starting rmnet SHS module\n", __func__);
trace_rmnet_shs_high(RMNET_SHS_MODULE, RMNET_SHS_MODULE_INIT,
0xDEF, 0xDEF, 0xDEF, 0xDEF, NULL, NULL);

if (rmnet_shs_wq_genl_init()) {
rm_err("%s", "SHS_GNL: Failed to init generic netlink");
}

return register_netdevice_notifier(&rmnet_shs_dev_notifier);
}

Expand All @@ -60,6 +66,9 @@ void __exit rmnet_shs_module_exit(void)
trace_rmnet_shs_high(RMNET_SHS_MODULE, RMNET_SHS_MODULE_EXIT,
0xDEF, 0xDEF, 0xDEF, 0xDEF, NULL, NULL);
unregister_netdevice_notifier(&rmnet_shs_dev_notifier);

rmnet_shs_wq_genl_deinit();

pr_info("%s(): Exiting rmnet SHS module\n", __func__);
}

Expand Down
6 changes: 5 additions & 1 deletion techpack/data/drivers/rmnet/shs/rmnet_shs_config.h
Expand Up @@ -42,12 +42,16 @@ enum rmnet_shs_crit_err_e {
RMNET_SHS_CPU_PKTLEN_ERR,
RMNET_SHS_NULL_SKB_HEAD,
RMNET_SHS_RPS_MASK_CHANGE,
RMNET_SHS_WQ_INVALID_CPU_ERR,
RMNET_SHS_WQ_INVALID_PTR_ERR,
RMNET_SHS_WQ_NODE_MALLOC_ERR,
RMNET_SHS_WQ_NL_SOCKET_ERR,
RMNET_SHS_CRIT_ERR_MAX
};

extern unsigned int rmnet_shs_debug;
extern unsigned int rmnet_shs_stats_enabled;
extern unsigned long int rmnet_shs_crit_err[RMNET_SHS_CRIT_ERR_MAX];
extern unsigned long rmnet_shs_crit_err[RMNET_SHS_CRIT_ERR_MAX];
extern struct rmnet_shs_cfg_s rmnet_shs_cfg;
extern int rmnet_is_real_dev_registered(const struct net_device *real_dev);

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4 changes: 2 additions & 2 deletions techpack/data/drivers/rmnet/shs/rmnet_shs_freq.c
Expand Up @@ -88,7 +88,7 @@ void rmnet_shs_reset_freq(void)
}
}

void rmnet_shs_boost_cpus()
void rmnet_shs_boost_cpus(void)
{
struct cpu_freq *boost;
int i;
Expand All @@ -110,7 +110,7 @@ void rmnet_shs_boost_cpus()
queue_work(shs_boost_wq, &boost_cpu);
}

void rmnet_shs_reset_cpus()
void rmnet_shs_reset_cpus(void)
{
struct cpu_freq *boost;
int i;
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