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ASoC: fsl_rpmsg: Add CPU DAI driver for audio base on rpmsg
This is a cpu dai driver for rpmsg audio use case, which is mainly used for getting the user's configuration from devicetree and configure the clocks which is used by Cortex-M core. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
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// SPDX-License-Identifier: GPL-2.0+ | ||
// Copyright 2018-2021 NXP | ||
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#include <linux/clk.h> | ||
#include <linux/clk-provider.h> | ||
#include <linux/delay.h> | ||
#include <linux/dmaengine.h> | ||
#include <linux/module.h> | ||
#include <linux/of_device.h> | ||
#include <linux/of_address.h> | ||
#include <linux/pm_runtime.h> | ||
#include <linux/rpmsg.h> | ||
#include <linux/slab.h> | ||
#include <sound/core.h> | ||
#include <sound/dmaengine_pcm.h> | ||
#include <sound/pcm_params.h> | ||
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#include "fsl_rpmsg.h" | ||
#include "imx-pcm.h" | ||
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#define FSL_RPMSG_RATES (SNDRV_PCM_RATE_8000 | \ | ||
SNDRV_PCM_RATE_16000 | \ | ||
SNDRV_PCM_RATE_48000) | ||
#define FSL_RPMSG_FORMATS SNDRV_PCM_FMTBIT_S16_LE | ||
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static const unsigned int fsl_rpmsg_rates[] = { | ||
8000, 11025, 16000, 22050, 44100, | ||
32000, 48000, 96000, 88200, 176400, 192000, | ||
352800, 384000, 705600, 768000, 1411200, 2822400, | ||
}; | ||
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static const struct snd_pcm_hw_constraint_list fsl_rpmsg_rate_constraints = { | ||
.count = ARRAY_SIZE(fsl_rpmsg_rates), | ||
.list = fsl_rpmsg_rates, | ||
}; | ||
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static int fsl_rpmsg_hw_params(struct snd_pcm_substream *substream, | ||
struct snd_pcm_hw_params *params, | ||
struct snd_soc_dai *dai) | ||
{ | ||
struct fsl_rpmsg *rpmsg = snd_soc_dai_get_drvdata(dai); | ||
struct clk *p = rpmsg->mclk, *pll = 0, *npll = 0; | ||
unsigned int rate = params_rate(params); | ||
int ret = 0; | ||
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/* Get current pll parent */ | ||
while (p && rpmsg->pll8k && rpmsg->pll11k) { | ||
struct clk *pp = clk_get_parent(p); | ||
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if (clk_is_match(pp, rpmsg->pll8k) || | ||
clk_is_match(pp, rpmsg->pll11k)) { | ||
pll = pp; | ||
break; | ||
} | ||
p = pp; | ||
} | ||
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/* Switch to another pll parent if needed. */ | ||
if (pll) { | ||
npll = (do_div(rate, 8000) ? rpmsg->pll11k : rpmsg->pll8k); | ||
if (!clk_is_match(pll, npll)) { | ||
ret = clk_set_parent(p, npll); | ||
if (ret < 0) | ||
dev_warn(dai->dev, "failed to set parent %s: %d\n", | ||
__clk_get_name(npll), ret); | ||
} | ||
} | ||
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if (!(rpmsg->mclk_streams & BIT(substream->stream))) { | ||
ret = clk_prepare_enable(rpmsg->mclk); | ||
if (ret) { | ||
dev_err(dai->dev, "failed to enable mclk: %d\n", ret); | ||
return ret; | ||
} | ||
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rpmsg->mclk_streams |= BIT(substream->stream); | ||
} | ||
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return ret; | ||
} | ||
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static int fsl_rpmsg_hw_free(struct snd_pcm_substream *substream, | ||
struct snd_soc_dai *dai) | ||
{ | ||
struct fsl_rpmsg *rpmsg = snd_soc_dai_get_drvdata(dai); | ||
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if (rpmsg->mclk_streams & BIT(substream->stream)) { | ||
clk_disable_unprepare(rpmsg->mclk); | ||
rpmsg->mclk_streams &= ~BIT(substream->stream); | ||
} | ||
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return 0; | ||
} | ||
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static int fsl_rpmsg_startup(struct snd_pcm_substream *substream, | ||
struct snd_soc_dai *cpu_dai) | ||
{ | ||
int ret; | ||
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ret = snd_pcm_hw_constraint_list(substream->runtime, 0, | ||
SNDRV_PCM_HW_PARAM_RATE, | ||
&fsl_rpmsg_rate_constraints); | ||
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return ret; | ||
} | ||
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static const struct snd_soc_dai_ops fsl_rpmsg_dai_ops = { | ||
.startup = fsl_rpmsg_startup, | ||
.hw_params = fsl_rpmsg_hw_params, | ||
.hw_free = fsl_rpmsg_hw_free, | ||
}; | ||
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static struct snd_soc_dai_driver fsl_rpmsg_dai = { | ||
.playback = { | ||
.stream_name = "CPU-Playback", | ||
.channels_min = 2, | ||
.channels_max = 2, | ||
.rates = SNDRV_PCM_RATE_KNOT, | ||
.formats = FSL_RPMSG_FORMATS, | ||
}, | ||
.capture = { | ||
.stream_name = "CPU-Capture", | ||
.channels_min = 2, | ||
.channels_max = 2, | ||
.rates = SNDRV_PCM_RATE_KNOT, | ||
.formats = FSL_RPMSG_FORMATS, | ||
}, | ||
.symmetric_rate = 1, | ||
.symmetric_channels = 1, | ||
.symmetric_sample_bits = 1, | ||
.ops = &fsl_rpmsg_dai_ops, | ||
}; | ||
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static const struct snd_soc_component_driver fsl_component = { | ||
.name = "fsl-rpmsg", | ||
}; | ||
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static const struct of_device_id fsl_rpmsg_ids[] = { | ||
{ .compatible = "fsl,imx7ulp-rpmsg"}, | ||
{ .compatible = "fsl,imx8mm-rpmsg"}, | ||
{ .compatible = "fsl,imx8mn-rpmsg"}, | ||
{ .compatible = "fsl,imx8mp-rpmsg"}, | ||
{ /* sentinel */ } | ||
}; | ||
MODULE_DEVICE_TABLE(of, fsl_rpmsg_ids); | ||
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static int fsl_rpmsg_probe(struct platform_device *pdev) | ||
{ | ||
struct device_node *np = pdev->dev.of_node; | ||
struct fsl_rpmsg *rpmsg; | ||
int ret; | ||
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rpmsg = devm_kzalloc(&pdev->dev, sizeof(struct fsl_rpmsg), GFP_KERNEL); | ||
if (!rpmsg) | ||
return -ENOMEM; | ||
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ret = of_property_read_u32(np, "fsl,audioindex", &rpmsg->audioindex); | ||
if (ret) | ||
rpmsg->audioindex = 0; | ||
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if (of_property_read_u32(np, "fsl,buffer-size", &rpmsg->buffer_size)) | ||
rpmsg->buffer_size = IMX_DEFAULT_DMABUF_SIZE; | ||
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if (of_property_read_bool(pdev->dev.of_node, "fsl,enable-lpa")) | ||
rpmsg->enable_lpa = 1; | ||
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ret = of_property_read_u32(np, "fsl,version", &rpmsg->version); | ||
if (ret) | ||
rpmsg->version = API_VERSION_V2; | ||
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/*Get the optional clocks */ | ||
rpmsg->ipg = devm_clk_get(&pdev->dev, "ipg"); | ||
if (IS_ERR(rpmsg->ipg)) | ||
rpmsg->ipg = NULL; | ||
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rpmsg->mclk = devm_clk_get(&pdev->dev, "mclk"); | ||
if (IS_ERR(rpmsg->mclk)) | ||
rpmsg->mclk = NULL; | ||
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rpmsg->dma = devm_clk_get(&pdev->dev, "dma"); | ||
if (IS_ERR(rpmsg->dma)) | ||
rpmsg->dma = NULL; | ||
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rpmsg->pll8k = devm_clk_get(&pdev->dev, "pll8k"); | ||
if (IS_ERR(rpmsg->pll8k)) | ||
rpmsg->pll8k = NULL; | ||
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rpmsg->pll11k = devm_clk_get(&pdev->dev, "pll11k"); | ||
if (IS_ERR(rpmsg->pll11k)) | ||
rpmsg->pll11k = NULL; | ||
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platform_set_drvdata(pdev, rpmsg); | ||
pm_runtime_enable(&pdev->dev); | ||
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ret = devm_snd_soc_register_component(&pdev->dev, &fsl_component, | ||
&fsl_rpmsg_dai, 1); | ||
if (ret) | ||
return ret; | ||
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return 0; | ||
} | ||
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#ifdef CONFIG_PM | ||
static int fsl_rpmsg_runtime_resume(struct device *dev) | ||
{ | ||
struct fsl_rpmsg *rpmsg = dev_get_drvdata(dev); | ||
int ret; | ||
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ret = clk_prepare_enable(rpmsg->ipg); | ||
if (ret) { | ||
dev_err(dev, "failed to enable ipg clock: %d\n", ret); | ||
goto ipg_err; | ||
} | ||
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ret = clk_prepare_enable(rpmsg->dma); | ||
if (ret) { | ||
dev_err(dev, "Failed to enable dma clock %d\n", ret); | ||
goto dma_err; | ||
} | ||
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return 0; | ||
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dma_err: | ||
clk_disable_unprepare(rpmsg->ipg); | ||
ipg_err: | ||
return ret; | ||
} | ||
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static int fsl_rpmsg_runtime_suspend(struct device *dev) | ||
{ | ||
struct fsl_rpmsg *rpmsg = dev_get_drvdata(dev); | ||
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clk_disable_unprepare(rpmsg->dma); | ||
clk_disable_unprepare(rpmsg->ipg); | ||
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return 0; | ||
} | ||
#endif | ||
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static const struct dev_pm_ops fsl_rpmsg_pm_ops = { | ||
SET_RUNTIME_PM_OPS(fsl_rpmsg_runtime_suspend, | ||
fsl_rpmsg_runtime_resume, | ||
NULL) | ||
SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, | ||
pm_runtime_force_resume) | ||
}; | ||
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static struct platform_driver fsl_rpmsg_driver = { | ||
.probe = fsl_rpmsg_probe, | ||
.driver = { | ||
.name = "fsl_rpmsg", | ||
.pm = &fsl_rpmsg_pm_ops, | ||
.of_match_table = fsl_rpmsg_ids, | ||
}, | ||
}; | ||
module_platform_driver(fsl_rpmsg_driver); | ||
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MODULE_DESCRIPTION("Freescale SoC Audio PRMSG CPU Interface"); | ||
MODULE_AUTHOR("Shengjiu Wang <shengjiu.wang@nxp.com>"); | ||
MODULE_ALIAS("platform:fsl_rpmsg"); | ||
MODULE_LICENSE("GPL"); |
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/* SPDX-License-Identifier: GPL-2.0 */ | ||
/* | ||
* Copyright 2017-2021 NXP | ||
*/ | ||
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#ifndef __FSL_RPMSG_H | ||
#define __FSL_RPMSG_H | ||
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#define API_VERSION_V1 1 | ||
#define API_VERSION_V2 2 | ||
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/* | ||
* struct fsl_rpmsg - rpmsg private data | ||
* | ||
* @ipg: ipg clock for cpu dai (SAI) | ||
* @mclk: master clock for cpu dai (SAI) | ||
* @dma: clock for dma device | ||
* @pll8k: parent clock for multiple of 8kHz frequency | ||
* @pll11k: parent clock for multiple of 11kHz frequency | ||
* @mclk_streams: Active streams that are using baudclk | ||
* @force_lpa: force enable low power audio routine if condition satisfy | ||
* @enable_lpa: enable low power audio routine according to dts setting | ||
* @buffer_size: pre allocated dma buffer size | ||
* @audioindex: audio instance index | ||
* @version: rpmsg image version | ||
*/ | ||
struct fsl_rpmsg { | ||
struct clk *ipg; | ||
struct clk *mclk; | ||
struct clk *dma; | ||
struct clk *pll8k; | ||
struct clk *pll11k; | ||
unsigned int mclk_streams; | ||
int force_lpa; | ||
int enable_lpa; | ||
int buffer_size; | ||
int audioindex; | ||
int version; | ||
}; | ||
#endif /* __FSL_RPMSG_H */ |