L1TF support in PowerPC SYSFS.

PowerPC CPUs are vulnerable to L1TF to the same extent as to Meltdown.
It is also mitigated by flushing the L1D on privilege transition.
Currently the SYSFS gives a false negative on L1TF on CPUs that I verified
to be vulnerable.
https://www.ibm.com/blogs/psirt/potential-impact-processors-power-family/
google/safeside#52
Signed-off-by: Anthony Steinhauser <asteinhauser@google.com>

arch/powerpc/kernel/security.c

@@ -135,7 +135,8 @@ void setup_spectre_v2(void)
 #endif /* CONFIG_PPC_FSL_BOOK3E */
 
 #ifdef CONFIG_PPC_BOOK3S_64
-ssize_t cpu_show_meltdown(struct device *dev, struct device_attribute *attr, char *buf)
+static ssize_t cpu_show_delayed_fault_common(
+		struct device *dev, struct device_attribute *attr, char *buf)
 {
 	bool thread_priv;
 
@@ -167,6 +168,16 @@ ssize_t cpu_show_meltdown(struct device *dev, struct device_attribute *attr, cha
 
 	return sprintf(buf, "Vulnerable\n");
 }
+
+ssize_t cpu_show_l1tf(struct device *dev, struct device_attribute *attr, char *buf)
+{
+	return cpu_show_delayed_fault_common(dev, attr, buf);
+}
+
+ssize_t cpu_show_meltdown(struct device *dev, struct device_attribute *attr, char *buf)
+{
+	return cpu_show_delayed_fault_common(dev, attr, buf);
+}
 #endif
 
 ssize_t cpu_show_spectre_v1(struct device *dev, struct device_attribute *attr, char *buf)