drm/lsdc: add drm driver for loongson display controller

There is a display controller in loongson's LS2K1000 SoC and LS7A1000
bridge, and the DC in those chip is a PCI device. This display controller
have two display pipes but with only one hardware cursor. Each way has a
DVO output interface and the CRTC is able to scanout from 1920x1080
resolution at 60Hz. LS2K1000 is a SoC, only system memory is available.
Therefore scanout form system memory is the only choice and we prefer the
cma helper base solution even through it is possible to use VRAM helper
base solution on ls2k1000 by carving out part of system memory as VRAM.

The dc in ls7a1000 can scanout from both the system memory and the dedicate
VRAM attached to the ddr3 memory controller. Sadly, only scanout from the
VRAM is proved to be a reliable solution for massive product. Scanout from
the system memory suffer from some hardware deficiency which cause the
screen flickering under RAM pressure. This is the reason why we integrate
two distict helpers into one piece of device driver.

    +------+
    | DDR4 |
    +------+
       || MC0            +-----------------------+------------+
  +----------+   Hyper   |         LS7A1000      |    DDR3    |   +------+
  | LS3A4000 |<--------->| +--------+  +-------+ |   memory   |<->| VRAM |
  |   CPU    |<--------->| | GC1000 |  |  LSDC | | controller |   +------+
  +----------+ Transport | +--------+  +-+---+-+ +------------|
       || MC1            +---------------|---|----------------+
    +------+                             |   |
    | DDR4 |          +-------+    DVO0  |   |  DVO1  +------+
    +------+   VGA <--|ADV7125|<---------+   +------->|TFP410|--> DVI/HDMI
                      +-------+                       +------+

The above picture give a simple usage of LS7A1000, note that the encoder is
not necessary adv7125 or tfp410, it is a choice of the downstream board
manufacturer. Other candicate encoder can be ch7034b, sil9022 and ite66121
etc. This is the reason why we still need device tree to provide board
specific information. Beside, the dc in both ls2k1000 and ls7k1000 have
the vendor:device id of 0x0014:0x7a06. even the reverison id is also same.
We can't tell it apart simply(this is the firmware engineer's mistake).
But firmware already flushed to the board and sold out, so we resolve those
issues by using the device tree which already have certain support.

Nevertheless, this patch try to provided a minimal support for this display
controller which is mainly for graphic environment bring up. Hope that the
code can speak for itself.

For ls7a1000, there are 4 gpios who register is located at dc register
space which is used to emulation i2c. LS2K1000 and LS2K0500 SoC don't
have those hardware, they use general purpose gpio or hardware i2c to
serve this purpose. For ladc, there is only a 1:1 mapping of encoders
and connectors.

     +-------------------+                                      _________
     |                   |                                     |         |
     |  CRTC0 --> DVO0 ---------> Encoder0 --> Connector0 ---> | Monotor |
     |                   |           ^            ^            |_________|
     |                   |           |            |
     |                <----- i2c0 ----------------+
     |   LSDC IP CORE    |
     |                <----- i2c1 ----------------+
     |                   |           |            |             _________
     |                   |           |            |            |         |
     |  CRTC1 --> DVO1 ---------> Encoder1 --> Connector1 ---> |  Panel  |
     |                   |                                     |_________|
     +-------------------+

Below is a brief introduction of loongson's CPU, bridge chip and SoC.
LS2K1000 is a double core 1.0Ghz mips64r2 compatible SoC[1]. LS7A1000 is
a bridge chip made by Loongson corporation which act as north and/or south
bridge of loongson's desktop and server level processor. It is equivalent
to RS780E or something like that. More details can be read from its user
manual[2].

This bridge chip is typically use with LS3A3000, LS3A4000 and LS3A5000 cpu.
LS3A3000 is 4 core 1.45gHz mips64r2 compatible cpu.
LS3A4000 is 4 core 1.8gHz mips64r5 compatible cpu.
LS3A5000 is 4 core 2.5gHz loongarch cpu[3].

v2: fixup warnings reported by kernel test robot

v3: fix more grammar mistakes in Kconfig reported by Randy Dunlap and give
    more details about lsdc.

v4:
   1) Add dts required and explain why device tree is required.
   2) Give more description about lsdc and vram helper base driver.
   3) Fix warnings reported by kernel test robot.
   4) Introduce stride_alignment member into struct lsdc_chip_desc, the
      stride alignment is 256 bytes for ls7a1000, ls2k1000 and ls2k0500 SoC.
      But ls7a2000 improve it to 32 bytes, We are prepare for extend the
      support for the on coming device.

v5:
   1) using writel and readl replace writeq and readq, to fix kernel test
      robot report build error on other archtecture
   2) set default fb format to XRGB8888 at crtc reset time.
   3) fix typos.

[1] https://wiki.debian.org/InstallingDebianOn/Lemote/Loongson2K1000
[2] https://loongson.github.io/LoongArch-Documentation/Loongson-7A1000-usermanual-EN.html
[3] https://loongson.github.io/LoongArch-Documentation/Loongson-3A5000-usermanual-EN.html

Reported-by: Randy Dunlap <rdunlap@infradead.org>
Reported-by: kernel test robot
Signed-off-by: suijingfeng <suijingfeng@loongson.cn>
Signed-off-by: Sui Jingfeng <15330273260@189.cn>

drivers/gpu/drm/Kconfig

@@ -405,6 +405,8 @@ source "drivers/gpu/drm/gud/Kconfig"
 
 source "drivers/gpu/drm/sprd/Kconfig"
 
+source "drivers/gpu/drm/lsdc/Kconfig"
+
 config DRM_HYPERV
 	tristate "DRM Support for Hyper-V synthetic video device"
 	depends on DRM && PCI && MMU && HYPERV

drivers/gpu/drm/Makefile

@@ -133,3 +133,4 @@ obj-y			+= xlnx/
 obj-y			+= gud/
 obj-$(CONFIG_DRM_HYPERV) += hyperv/
 obj-$(CONFIG_DRM_SPRD) += sprd/
+obj-$(CONFIG_DRM_LSDC) += lsdc/

drivers/gpu/drm/lsdc/Kconfig

@@ -0,0 +1,38 @@
+config DRM_LSDC
+	tristate "DRM Support for loongson's display controller"
+	depends on DRM && PCI
+	depends on MACH_LOONGSON64 || LOONGARCH || MIPS || COMPILE_TEST
+	select OF
+	select CMA if HAVE_DMA_CONTIGUOUS
+	select DMA_CMA if HAVE_DMA_CONTIGUOUS
+	select DRM_KMS_HELPER
+	select DRM_KMS_FB_HELPER
+	select DRM_GEM_CMA_HELPER
+	select VIDEOMODE_HELPERS
+	select BACKLIGHT_PWM if CPU_LOONGSON2K
+	select I2C_GPIO if CPU_LOONGSON2K
+	select I2C_LS2X if CPU_LOONGSON2K
+	default m
+	help
+	  This is a KMS driver for the display controller in the LS7A1000
+	  bridge chip and LS2K1000 SoC. The display controller has two
+	  display pipes and it is a PCI device.
+	  When using this driver on LS2K1000/LS2K0500 SoC, its framebuffer
+	  is located at system memory.
+	  If "M" is selected, the module will be called lsdc.
+
+	  If in doubt, say "Y".
+
+config DRM_LSDC_VRAM_DRIVER
+	bool "vram helper based device driver support"
+	depends on DRM_LSDC
+	select DRM_VRAM_HELPER
+	default y
+	help
+	  When using this driver on LS7A1000 + LS3A3000/LS3A4000/LS3A5000
+	  platform, the LS7A1000 bridge chip has dedicated video RAM. Using
+	  "lsdc.use_vram_helper=1" in the kernel command line will enable
+	  this driver mode and then the framebuffer will be located at the
+	  VRAM at the price of losing PRIME support.
+
+	  If in doubt, say "Y".

drivers/gpu/drm/lsdc/Makefile

@@ -0,0 +1,15 @@
+#
+# Makefile for the lsdc drm device driver.
+#
+
+lsdc-y := \
+	lsdc_drv.o \
+	lsdc_crtc.o \
+	lsdc_irq.o \
+	lsdc_plane.o \
+	lsdc_pll.o \
+	lsdc_i2c.o \
+	lsdc_encoder.o \
+	lsdc_connector.o
+
+obj-$(CONFIG_DRM_LSDC) += lsdc.o