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phy: ralink: phy-mt7621-pci: use kernel clock APIS
MT7621 SoC clock driver has already mainlined in 'commit 48df7a2 ("clk: ralink: add clock driver for mt7621 SoC")' This allow us to properly use kernel clock apis to get the clock frequency needed for the phy configuration instead of use custom architecture code to do the same. Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
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