Post-merge fixes and SSA regen.

4a6f656c · Oct 15, 2019 · 5e78c0d · 5e78c0d
1 parent 21b7a24
commit 5e78c0d
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Showing 7 changed files with 320 additions and 587 deletions.
diff --git a/src/cmd/compile/internal/riscv64/ssa.go b/src/cmd/compile/internal/riscv64/ssa.go
@@ -497,7 +497,7 @@ func ssaGenBlock(s *gc.SSAGenState, b, next *ssa.Block) {
 				s.Br(obj.AJMP, b.Succs[0].Block())
 			}
 		}
-		p.Reg = b.Control.Reg()
+		p.Reg = b.Controls[0].Reg()
 		p.From.Type = obj.TYPE_REG
 		p.From.Reg = riscv.REG_ZERO
 

diff --git a/src/cmd/compile/internal/ssa/gen/RISCV64Ops.go b/src/cmd/compile/internal/ssa/gen/RISCV64Ops.go
@@ -20,7 +20,7 @@ func init() {
 	addreg := func(r int, name string) regMask {
 		mask := regMask(1) << uint(len(regNamesRISCV64))
 		if name == "" {
-			name = riscv.RegNames[int16(r)]
+			name = riscv.RegName(r)
 		}
 		regNamesRISCV64 = append(regNamesRISCV64, name)
 		regNamed[name] = mask
@@ -286,7 +286,7 @@ func init() {
 	}
 
 	RISCV64blocks := []blockData{
-		{name: "BNE"}, // Control != 0 (take a register)
+		{name: "BNE", controls: 1}, // Control != 0 (take a register)
 	}
 
 	archs = append(archs, arch{

diff --git a/src/cmd/compile/internal/ssa/opGen.go b/src/cmd/compile/internal/ssa/opGen.go