32 bit arm regs #315
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32 bit arm regs #315
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aarch64 regs are called x0-xN... And you can access the 16 bit part of them individually. |
bitwave
reviewed
Oct 2, 2021
libafl_qemu/src/aarch64.rs
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| #[derive(IntoPrimitive, TryFromPrimitive, Debug, Clone, Copy, EnumIter)] | ||
| #[repr(i32)] | ||
| pub enum Aarch64Regs { | ||
| R0 = 0, |
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aarch64 regs are called x0-xN... And you can access the 16 bit part of them individually.
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aarch is more complex, dropped it for now
andreafioraldi
approved these changes
Oct 11, 2021
khang06
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to khang06/LibAFL
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Oct 11, 2022
* aarch and arm regs * fix arm, remove aarch64 * remove aarch64 mod
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Although some way to autogenerate registers would probably be nicer in the long run, this PR adds a the basic arm and aarch64 registers