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Merge pull request #118 from bcostm/master
Add STMicroelectronics NUCLEO_F103RB target
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.../targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_MICRO/startup_stm32f10x_md.s
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;******************** (C) COPYRIGHT 2011 STMicroelectronics ******************** | ||
;* File Name : startup_stm32f10x_md.s | ||
;* Author : MCD Application Team | ||
;* Version : V3.5.0 | ||
;* Date : 11-March-2011 | ||
;* Description : STM32F10x Medium Density Devices vector table for MDK-ARM | ||
;* toolchain. | ||
;* This module performs: | ||
;* - Set the initial SP | ||
;* - Set the initial PC == Reset_Handler | ||
;* - Set the vector table entries with the exceptions ISR address | ||
;* - Configure the clock system | ||
;* - Branches to __main in the C library (which eventually | ||
;* calls main()). | ||
;* After Reset the CortexM3 processor is in Thread mode, | ||
;* priority is Privileged, and the Stack is set to Main. | ||
;* <<< Use Configuration Wizard in Context Menu >>> | ||
;******************************************************************************* | ||
; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS | ||
; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. | ||
; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, | ||
; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE | ||
; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING | ||
; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. | ||
;******************************************************************************* | ||
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; Amount of memory (in bytes) allocated for Stack | ||
; Tailor this value to your application needs | ||
; <h> Stack Configuration | ||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> | ||
; </h> | ||
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Stack_Size EQU 0x00000400 | ||
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AREA STACK, NOINIT, READWRITE, ALIGN=3 | ||
Stack_Mem SPACE Stack_Size | ||
__initial_sp EQU 0x20005000 ; Top of RAM | ||
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; <h> Heap Configuration | ||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> | ||
; </h> | ||
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Heap_Size EQU 0x00000200 | ||
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AREA HEAP, NOINIT, READWRITE, ALIGN=3 | ||
__heap_base | ||
Heap_Mem SPACE Heap_Size | ||
__heap_limit | ||
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PRESERVE8 | ||
THUMB | ||
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; Vector Table Mapped to Address 0 at Reset | ||
AREA RESET, DATA, READONLY | ||
EXPORT __Vectors | ||
EXPORT __Vectors_End | ||
EXPORT __Vectors_Size | ||
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__Vectors DCD __initial_sp ; Top of Stack | ||
DCD Reset_Handler ; Reset Handler | ||
DCD NMI_Handler ; NMI Handler | ||
DCD HardFault_Handler ; Hard Fault Handler | ||
DCD MemManage_Handler ; MPU Fault Handler | ||
DCD BusFault_Handler ; Bus Fault Handler | ||
DCD UsageFault_Handler ; Usage Fault Handler | ||
DCD 0 ; Reserved | ||
DCD 0 ; Reserved | ||
DCD 0 ; Reserved | ||
DCD 0 ; Reserved | ||
DCD SVC_Handler ; SVCall Handler | ||
DCD DebugMon_Handler ; Debug Monitor Handler | ||
DCD 0 ; Reserved | ||
DCD PendSV_Handler ; PendSV Handler | ||
DCD SysTick_Handler ; SysTick Handler | ||
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; External Interrupts | ||
DCD WWDG_IRQHandler ; Window Watchdog | ||
DCD PVD_IRQHandler ; PVD through EXTI Line detect | ||
DCD TAMPER_IRQHandler ; Tamper | ||
DCD RTC_IRQHandler ; RTC | ||
DCD FLASH_IRQHandler ; Flash | ||
DCD RCC_IRQHandler ; RCC | ||
DCD EXTI0_IRQHandler ; EXTI Line 0 | ||
DCD EXTI1_IRQHandler ; EXTI Line 1 | ||
DCD EXTI2_IRQHandler ; EXTI Line 2 | ||
DCD EXTI3_IRQHandler ; EXTI Line 3 | ||
DCD EXTI4_IRQHandler ; EXTI Line 4 | ||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 | ||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 | ||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 | ||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 | ||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 | ||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 | ||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 | ||
DCD ADC1_2_IRQHandler ; ADC1_2 | ||
DCD USB_HP_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX | ||
DCD USB_LP_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0 | ||
DCD CAN1_RX1_IRQHandler ; CAN1 RX1 | ||
DCD CAN1_SCE_IRQHandler ; CAN1 SCE | ||
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 | ||
DCD TIM1_BRK_IRQHandler ; TIM1 Break | ||
DCD TIM1_UP_IRQHandler ; TIM1 Update | ||
DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation | ||
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare | ||
DCD TIM2_IRQHandler ; TIM2 | ||
DCD TIM3_IRQHandler ; TIM3 | ||
DCD TIM4_IRQHandler ; TIM4 | ||
DCD I2C1_EV_IRQHandler ; I2C1 Event | ||
DCD I2C1_ER_IRQHandler ; I2C1 Error | ||
DCD I2C2_EV_IRQHandler ; I2C2 Event | ||
DCD I2C2_ER_IRQHandler ; I2C2 Error | ||
DCD SPI1_IRQHandler ; SPI1 | ||
DCD SPI2_IRQHandler ; SPI2 | ||
DCD USART1_IRQHandler ; USART1 | ||
DCD USART2_IRQHandler ; USART2 | ||
DCD USART3_IRQHandler ; USART3 | ||
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 | ||
DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line | ||
DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend | ||
__Vectors_End | ||
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__Vectors_Size EQU __Vectors_End - __Vectors | ||
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AREA |.text|, CODE, READONLY | ||
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; Reset handler | ||
Reset_Handler PROC | ||
EXPORT Reset_Handler [WEAK] | ||
IMPORT __main | ||
IMPORT SystemInit | ||
LDR R0, =SystemInit | ||
BLX R0 | ||
LDR R0, =__main | ||
BX R0 | ||
ENDP | ||
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; Dummy Exception Handlers (infinite loops which can be modified) | ||
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NMI_Handler PROC | ||
EXPORT NMI_Handler [WEAK] | ||
B . | ||
ENDP | ||
HardFault_Handler\ | ||
PROC | ||
EXPORT HardFault_Handler [WEAK] | ||
B . | ||
ENDP | ||
MemManage_Handler\ | ||
PROC | ||
EXPORT MemManage_Handler [WEAK] | ||
B . | ||
ENDP | ||
BusFault_Handler\ | ||
PROC | ||
EXPORT BusFault_Handler [WEAK] | ||
B . | ||
ENDP | ||
UsageFault_Handler\ | ||
PROC | ||
EXPORT UsageFault_Handler [WEAK] | ||
B . | ||
ENDP | ||
SVC_Handler PROC | ||
EXPORT SVC_Handler [WEAK] | ||
B . | ||
ENDP | ||
DebugMon_Handler\ | ||
PROC | ||
EXPORT DebugMon_Handler [WEAK] | ||
B . | ||
ENDP | ||
PendSV_Handler PROC | ||
EXPORT PendSV_Handler [WEAK] | ||
B . | ||
ENDP | ||
SysTick_Handler PROC | ||
EXPORT SysTick_Handler [WEAK] | ||
B . | ||
ENDP | ||
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Default_Handler PROC | ||
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EXPORT WWDG_IRQHandler [WEAK] | ||
EXPORT PVD_IRQHandler [WEAK] | ||
EXPORT TAMPER_IRQHandler [WEAK] | ||
EXPORT RTC_IRQHandler [WEAK] | ||
EXPORT FLASH_IRQHandler [WEAK] | ||
EXPORT RCC_IRQHandler [WEAK] | ||
EXPORT EXTI0_IRQHandler [WEAK] | ||
EXPORT EXTI1_IRQHandler [WEAK] | ||
EXPORT EXTI2_IRQHandler [WEAK] | ||
EXPORT EXTI3_IRQHandler [WEAK] | ||
EXPORT EXTI4_IRQHandler [WEAK] | ||
EXPORT DMA1_Channel1_IRQHandler [WEAK] | ||
EXPORT DMA1_Channel2_IRQHandler [WEAK] | ||
EXPORT DMA1_Channel3_IRQHandler [WEAK] | ||
EXPORT DMA1_Channel4_IRQHandler [WEAK] | ||
EXPORT DMA1_Channel5_IRQHandler [WEAK] | ||
EXPORT DMA1_Channel6_IRQHandler [WEAK] | ||
EXPORT DMA1_Channel7_IRQHandler [WEAK] | ||
EXPORT ADC1_2_IRQHandler [WEAK] | ||
EXPORT USB_HP_CAN1_TX_IRQHandler [WEAK] | ||
EXPORT USB_LP_CAN1_RX0_IRQHandler [WEAK] | ||
EXPORT CAN1_RX1_IRQHandler [WEAK] | ||
EXPORT CAN1_SCE_IRQHandler [WEAK] | ||
EXPORT EXTI9_5_IRQHandler [WEAK] | ||
EXPORT TIM1_BRK_IRQHandler [WEAK] | ||
EXPORT TIM1_UP_IRQHandler [WEAK] | ||
EXPORT TIM1_TRG_COM_IRQHandler [WEAK] | ||
EXPORT TIM1_CC_IRQHandler [WEAK] | ||
EXPORT TIM2_IRQHandler [WEAK] | ||
EXPORT TIM3_IRQHandler [WEAK] | ||
EXPORT TIM4_IRQHandler [WEAK] | ||
EXPORT I2C1_EV_IRQHandler [WEAK] | ||
EXPORT I2C1_ER_IRQHandler [WEAK] | ||
EXPORT I2C2_EV_IRQHandler [WEAK] | ||
EXPORT I2C2_ER_IRQHandler [WEAK] | ||
EXPORT SPI1_IRQHandler [WEAK] | ||
EXPORT SPI2_IRQHandler [WEAK] | ||
EXPORT USART1_IRQHandler [WEAK] | ||
EXPORT USART2_IRQHandler [WEAK] | ||
EXPORT USART3_IRQHandler [WEAK] | ||
EXPORT EXTI15_10_IRQHandler [WEAK] | ||
EXPORT RTCAlarm_IRQHandler [WEAK] | ||
EXPORT USBWakeUp_IRQHandler [WEAK] | ||
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WWDG_IRQHandler | ||
PVD_IRQHandler | ||
TAMPER_IRQHandler | ||
RTC_IRQHandler | ||
FLASH_IRQHandler | ||
RCC_IRQHandler | ||
EXTI0_IRQHandler | ||
EXTI1_IRQHandler | ||
EXTI2_IRQHandler | ||
EXTI3_IRQHandler | ||
EXTI4_IRQHandler | ||
DMA1_Channel1_IRQHandler | ||
DMA1_Channel2_IRQHandler | ||
DMA1_Channel3_IRQHandler | ||
DMA1_Channel4_IRQHandler | ||
DMA1_Channel5_IRQHandler | ||
DMA1_Channel6_IRQHandler | ||
DMA1_Channel7_IRQHandler | ||
ADC1_2_IRQHandler | ||
USB_HP_CAN1_TX_IRQHandler | ||
USB_LP_CAN1_RX0_IRQHandler | ||
CAN1_RX1_IRQHandler | ||
CAN1_SCE_IRQHandler | ||
EXTI9_5_IRQHandler | ||
TIM1_BRK_IRQHandler | ||
TIM1_UP_IRQHandler | ||
TIM1_TRG_COM_IRQHandler | ||
TIM1_CC_IRQHandler | ||
TIM2_IRQHandler | ||
TIM3_IRQHandler | ||
TIM4_IRQHandler | ||
I2C1_EV_IRQHandler | ||
I2C1_ER_IRQHandler | ||
I2C2_EV_IRQHandler | ||
I2C2_ER_IRQHandler | ||
SPI1_IRQHandler | ||
SPI2_IRQHandler | ||
USART1_IRQHandler | ||
USART2_IRQHandler | ||
USART3_IRQHandler | ||
EXTI15_10_IRQHandler | ||
RTCAlarm_IRQHandler | ||
USBWakeUp_IRQHandler | ||
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B . | ||
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ENDP | ||
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ALIGN | ||
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;******************************************************************************* | ||
; User Stack and Heap initialization | ||
;******************************************************************************* | ||
IF :DEF:__MICROLIB | ||
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EXPORT __initial_sp | ||
EXPORT __heap_base | ||
EXPORT __heap_limit | ||
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ELSE | ||
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IMPORT __use_two_region_memory | ||
EXPORT __user_initial_stackheap | ||
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__user_initial_stackheap | ||
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LDR R0, = Heap_Mem | ||
LDR R1, =(Stack_Mem + Stack_Size) | ||
LDR R2, = (Heap_Mem + Heap_Size) | ||
LDR R3, = Stack_Mem | ||
BX LR | ||
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ALIGN | ||
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ENDIF | ||
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END | ||
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;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE***** |
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...ries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_MICRO/stm32f10x.sct
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; ************************************************************* | ||
; *** Scatter-Loading Description File generated by uVision *** | ||
; ************************************************************* | ||
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LR_IROM1 0x08000000 0x20000 { ; load region size_region (128K) | ||
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ER_IROM1 0x08000000 0x20000 { ; load address = execution address | ||
*.o (RESET, +First) | ||
*(InRoot$$Sections) | ||
.ANY (+RO) | ||
} | ||
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; 59 vectors (16 core + 43 peripheral) * 4 bytes = 236 bytes to reserve (0xEC) | ||
RW_IRAM1 (0x20000000+0xEC) (0x5000-0xEC) { ; RW data | ||
.ANY (+RW +ZI) | ||
} | ||
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} | ||
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libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_MICRO/sys.cpp
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/* mbed Microcontroller Library - stackheap | ||
* Copyright (C) 2009-2011 ARM Limited. All rights reserved. | ||
* | ||
* Setup a fixed single stack/heap memory model, | ||
* between the top of the RW/ZI region and the stackpointer | ||
*/ | ||
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#ifdef __cplusplus | ||
extern "C" { | ||
#endif | ||
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#include <rt_misc.h> | ||
#include <stdint.h> | ||
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extern char Image$$RW_IRAM1$$ZI$$Limit[]; | ||
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extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3) { | ||
uint32_t zi_limit = (uint32_t)Image$$RW_IRAM1$$ZI$$Limit; | ||
uint32_t sp_limit = __current_sp(); | ||
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zi_limit = (zi_limit + 7) & ~0x7; // ensure zi_limit is 8-byte aligned | ||
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struct __initial_stackheap r; | ||
r.heap_base = zi_limit; | ||
r.heap_limit = sp_limit; | ||
return r; | ||
} | ||
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#ifdef __cplusplus | ||
} | ||
#endif |
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