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Merge pull request #11561 from kyle-cypress/pr/target-063-ble
Add TARGET_CY8CPROTO_063_BLE
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34 changes: 34 additions & 0 deletions
34
.../TARGET_PSOC6/TARGET_CY8CPROTO_063_BLE/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg.c
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/******************************************************************************* | ||
* File Name: cycfg.c | ||
* | ||
* Description: | ||
* Wrapper function to initialize all generated code. | ||
* This file was automatically generated and should not be modified. | ||
* | ||
******************************************************************************** | ||
* Copyright 2017-2019 Cypress Semiconductor Corporation | ||
* SPDX-License-Identifier: Apache-2.0 | ||
* | ||
* Licensed under the Apache License, Version 2.0 (the "License"); | ||
* you may not use this file except in compliance with the License. | ||
* You may obtain a copy of the License at | ||
* | ||
* http://www.apache.org/licenses/LICENSE-2.0 | ||
* | ||
* Unless required by applicable law or agreed to in writing, software | ||
* distributed under the License is distributed on an "AS IS" BASIS, | ||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
* See the License for the specific language governing permissions and | ||
* limitations under the License. | ||
********************************************************************************/ | ||
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#include "cycfg.h" | ||
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void init_cycfg_all(void) | ||
{ | ||
init_cycfg_system(); | ||
init_cycfg_clocks(); | ||
init_cycfg_routing(); | ||
init_cycfg_peripherals(); | ||
init_cycfg_pins(); | ||
} |
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.../TARGET_PSOC6/TARGET_CY8CPROTO_063_BLE/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg.h
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/******************************************************************************* | ||
* File Name: cycfg.h | ||
* | ||
* Description: | ||
* Simple wrapper header containing all generated files. | ||
* This file was automatically generated and should not be modified. | ||
* | ||
******************************************************************************** | ||
* Copyright 2017-2019 Cypress Semiconductor Corporation | ||
* SPDX-License-Identifier: Apache-2.0 | ||
* | ||
* Licensed under the Apache License, Version 2.0 (the "License"); | ||
* you may not use this file except in compliance with the License. | ||
* You may obtain a copy of the License at | ||
* | ||
* http://www.apache.org/licenses/LICENSE-2.0 | ||
* | ||
* Unless required by applicable law or agreed to in writing, software | ||
* distributed under the License is distributed on an "AS IS" BASIS, | ||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
* See the License for the specific language governing permissions and | ||
* limitations under the License. | ||
********************************************************************************/ | ||
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#if !defined(CYCFG_H) | ||
#define CYCFG_H | ||
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#if defined(__cplusplus) | ||
extern "C" { | ||
#endif | ||
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#include "cycfg_notices.h" | ||
#include "cycfg_system.h" | ||
#include "cycfg_clocks.h" | ||
#include "cycfg_routing.h" | ||
#include "cycfg_peripherals.h" | ||
#include "cycfg_pins.h" | ||
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void init_cycfg_all(void); | ||
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#if defined(__cplusplus) | ||
} | ||
#endif | ||
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#endif /* CYCFG_H */ |
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...PSOC6/TARGET_CY8CPROTO_063_BLE/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg.timestamp
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/******************************************************************************* | ||
* File Name: cycfg.timestamp | ||
* | ||
* Description: | ||
* Sentinel file for determining if generated source is up to date. | ||
* This file was automatically generated and should not be modified. | ||
* | ||
******************************************************************************** | ||
* Copyright 2017-2019 Cypress Semiconductor Corporation | ||
* SPDX-License-Identifier: Apache-2.0 | ||
* | ||
* Licensed under the Apache License, Version 2.0 (the "License"); | ||
* you may not use this file except in compliance with the License. | ||
* You may obtain a copy of the License at | ||
* | ||
* http://www.apache.org/licenses/LICENSE-2.0 | ||
* | ||
* Unless required by applicable law or agreed to in writing, software | ||
* distributed under the License is distributed on an "AS IS" BASIS, | ||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
* See the License for the specific language governing permissions and | ||
* limitations under the License. | ||
********************************************************************************/ | ||
|
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45
..._PSOC6/TARGET_CY8CPROTO_063_BLE/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_clocks.c
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/******************************************************************************* | ||
* File Name: cycfg_clocks.c | ||
* | ||
* Description: | ||
* Clock configuration | ||
* This file was automatically generated and should not be modified. | ||
* | ||
******************************************************************************** | ||
* Copyright 2017-2019 Cypress Semiconductor Corporation | ||
* SPDX-License-Identifier: Apache-2.0 | ||
* | ||
* Licensed under the Apache License, Version 2.0 (the "License"); | ||
* you may not use this file except in compliance with the License. | ||
* You may obtain a copy of the License at | ||
* | ||
* http://www.apache.org/licenses/LICENSE-2.0 | ||
* | ||
* Unless required by applicable law or agreed to in writing, software | ||
* distributed under the License is distributed on an "AS IS" BASIS, | ||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
* See the License for the specific language governing permissions and | ||
* limitations under the License. | ||
********************************************************************************/ | ||
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#include "cycfg_clocks.h" | ||
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#if defined (CY_USING_HAL) | ||
const cyhal_resource_inst_t CYBSP_I2C_CLK_DIV_obj = | ||
{ | ||
.type = CYHAL_RSC_CLOCK, | ||
.block_num = CYBSP_I2C_CLK_DIV_HW, | ||
.channel_num = CYBSP_I2C_CLK_DIV_NUM, | ||
}; | ||
#endif //defined (CY_USING_HAL) | ||
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void init_cycfg_clocks(void) | ||
{ | ||
Cy_SysClk_PeriphDisableDivider(CY_SYSCLK_DIV_8_BIT, 1U); | ||
Cy_SysClk_PeriphSetDivider(CY_SYSCLK_DIV_8_BIT, 1U, 3U); | ||
Cy_SysClk_PeriphEnableDivider(CY_SYSCLK_DIV_8_BIT, 1U); | ||
#if defined (CY_USING_HAL) | ||
cyhal_hwmgr_reserve(&CYBSP_I2C_CLK_DIV_obj); | ||
#endif //defined (CY_USING_HAL) | ||
} |
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..._PSOC6/TARGET_CY8CPROTO_063_BLE/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_clocks.h
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/******************************************************************************* | ||
* File Name: cycfg_clocks.h | ||
* | ||
* Description: | ||
* Clock configuration | ||
* This file was automatically generated and should not be modified. | ||
* | ||
******************************************************************************** | ||
* Copyright 2017-2019 Cypress Semiconductor Corporation | ||
* SPDX-License-Identifier: Apache-2.0 | ||
* | ||
* Licensed under the Apache License, Version 2.0 (the "License"); | ||
* you may not use this file except in compliance with the License. | ||
* You may obtain a copy of the License at | ||
* | ||
* http://www.apache.org/licenses/LICENSE-2.0 | ||
* | ||
* Unless required by applicable law or agreed to in writing, software | ||
* distributed under the License is distributed on an "AS IS" BASIS, | ||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
* See the License for the specific language governing permissions and | ||
* limitations under the License. | ||
********************************************************************************/ | ||
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#if !defined(CYCFG_CLOCKS_H) | ||
#define CYCFG_CLOCKS_H | ||
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#include "cycfg_notices.h" | ||
#include "cy_sysclk.h" | ||
#if defined (CY_USING_HAL) | ||
#include "cyhal_hwmgr.h" | ||
#endif //defined (CY_USING_HAL) | ||
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#if defined(__cplusplus) | ||
extern "C" { | ||
#endif | ||
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#define CYBSP_I2C_CLK_DIV_ENABLED 1U | ||
#define CYBSP_I2C_CLK_DIV_HW CY_SYSCLK_DIV_8_BIT | ||
#define CYBSP_I2C_CLK_DIV_NUM 1U | ||
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#if defined (CY_USING_HAL) | ||
extern const cyhal_resource_inst_t CYBSP_I2C_CLK_DIV_obj; | ||
#endif //defined (CY_USING_HAL) | ||
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void init_cycfg_clocks(void); | ||
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#if defined(__cplusplus) | ||
} | ||
#endif | ||
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#endif /* CYCFG_CLOCKS_H */ |
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...PSOC6/TARGET_CY8CPROTO_063_BLE/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_notices.h
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/******************************************************************************* | ||
* File Name: cycfg_notices.h | ||
* | ||
* Description: | ||
* Contains warnings and errors that occurred while generating code for the | ||
* design. | ||
* This file was automatically generated and should not be modified. | ||
* | ||
******************************************************************************** | ||
* Copyright 2017-2019 Cypress Semiconductor Corporation | ||
* SPDX-License-Identifier: Apache-2.0 | ||
* | ||
* Licensed under the Apache License, Version 2.0 (the "License"); | ||
* you may not use this file except in compliance with the License. | ||
* You may obtain a copy of the License at | ||
* | ||
* http://www.apache.org/licenses/LICENSE-2.0 | ||
* | ||
* Unless required by applicable law or agreed to in writing, software | ||
* distributed under the License is distributed on an "AS IS" BASIS, | ||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
* See the License for the specific language governing permissions and | ||
* limitations under the License. | ||
********************************************************************************/ | ||
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#if !defined(CYCFG_NOTICES_H) | ||
#define CYCFG_NOTICES_H | ||
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#endif /* CYCFG_NOTICES_H */ |
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...6/TARGET_CY8CPROTO_063_BLE/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_peripherals.c
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/******************************************************************************* | ||
* File Name: cycfg_peripherals.c | ||
* | ||
* Description: | ||
* Peripheral Hardware Block configuration | ||
* This file was automatically generated and should not be modified. | ||
* | ||
******************************************************************************** | ||
* Copyright 2017-2019 Cypress Semiconductor Corporation | ||
* SPDX-License-Identifier: Apache-2.0 | ||
* | ||
* Licensed under the Apache License, Version 2.0 (the "License"); | ||
* you may not use this file except in compliance with the License. | ||
* You may obtain a copy of the License at | ||
* | ||
* http://www.apache.org/licenses/LICENSE-2.0 | ||
* | ||
* Unless required by applicable law or agreed to in writing, software | ||
* distributed under the License is distributed on an "AS IS" BASIS, | ||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
* See the License for the specific language governing permissions and | ||
* limitations under the License. | ||
********************************************************************************/ | ||
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#include "cycfg_peripherals.h" | ||
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#if defined (CY_USING_HAL) | ||
const cyhal_resource_inst_t bless_0_obj = | ||
{ | ||
.type = CYHAL_RSC_BLESS, | ||
.block_num = 0U, | ||
.channel_num = 0U, | ||
}; | ||
#endif //defined (CY_USING_HAL) | ||
const cy_stc_scb_ezi2c_config_t CYBSP_I2C_config = | ||
{ | ||
.numberOfAddresses = CY_SCB_EZI2C_ONE_ADDRESS, | ||
.slaveAddress1 = 8U, | ||
.slaveAddress2 = 0U, | ||
.subAddressSize = CY_SCB_EZI2C_SUB_ADDR16_BITS, | ||
.enableWakeFromSleep = false, | ||
}; | ||
#if defined (CY_USING_HAL) | ||
const cyhal_resource_inst_t CYBSP_I2C_obj = | ||
{ | ||
.type = CYHAL_RSC_SCB, | ||
.block_num = 8U, | ||
.channel_num = 0U, | ||
}; | ||
#endif //defined (CY_USING_HAL) | ||
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void init_cycfg_peripherals(void) | ||
{ | ||
#if defined (CY_USING_HAL) | ||
cyhal_hwmgr_reserve(&bless_0_obj); | ||
#endif //defined (CY_USING_HAL) | ||
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Cy_SysClk_PeriphAssignDivider(PCLK_SCB8_CLOCK, CY_SYSCLK_DIV_8_BIT, 1U); | ||
#if defined (CY_USING_HAL) | ||
cyhal_hwmgr_reserve(&CYBSP_I2C_obj); | ||
#endif //defined (CY_USING_HAL) | ||
} |
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...6/TARGET_CY8CPROTO_063_BLE/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_peripherals.h
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/******************************************************************************* | ||
* File Name: cycfg_peripherals.h | ||
* | ||
* Description: | ||
* Peripheral Hardware Block configuration | ||
* This file was automatically generated and should not be modified. | ||
* | ||
******************************************************************************** | ||
* Copyright 2017-2019 Cypress Semiconductor Corporation | ||
* SPDX-License-Identifier: Apache-2.0 | ||
* | ||
* Licensed under the Apache License, Version 2.0 (the "License"); | ||
* you may not use this file except in compliance with the License. | ||
* You may obtain a copy of the License at | ||
* | ||
* http://www.apache.org/licenses/LICENSE-2.0 | ||
* | ||
* Unless required by applicable law or agreed to in writing, software | ||
* distributed under the License is distributed on an "AS IS" BASIS, | ||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
* See the License for the specific language governing permissions and | ||
* limitations under the License. | ||
********************************************************************************/ | ||
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#if !defined(CYCFG_PERIPHERALS_H) | ||
#define CYCFG_PERIPHERALS_H | ||
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#include "cycfg_notices.h" | ||
#include "cy_scb_ezi2c.h" | ||
#include "cy_sysclk.h" | ||
#if defined (CY_USING_HAL) | ||
#include "cyhal_hwmgr.h" | ||
#endif //defined (CY_USING_HAL) | ||
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#if defined(__cplusplus) | ||
extern "C" { | ||
#endif | ||
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#define bless_0_ENABLED 1U | ||
#define CY_BLE_CORE_CORTEX_M4 4U | ||
#define CY_BLE_CORE_CORTEX_M0P 0U | ||
#define CY_BLE_CORE_DUAL 255U | ||
#ifndef CY_BLE_CORE | ||
#define CY_BLE_CORE 4U | ||
#endif | ||
#define CY_BLE_IRQ bless_interrupt_IRQn | ||
#define CYBSP_I2C_ENABLED 1U | ||
#define CYBSP_I2C_HW SCB8 | ||
#define CYBSP_I2C_IRQ scb_8_interrupt_IRQn | ||
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#if defined (CY_USING_HAL) | ||
extern const cyhal_resource_inst_t bless_0_obj; | ||
#endif //defined (CY_USING_HAL) | ||
extern const cy_stc_scb_ezi2c_config_t CYBSP_I2C_config; | ||
#if defined (CY_USING_HAL) | ||
extern const cyhal_resource_inst_t CYBSP_I2C_obj; | ||
#endif //defined (CY_USING_HAL) | ||
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void init_cycfg_peripherals(void); | ||
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#if defined(__cplusplus) | ||
} | ||
#endif | ||
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#endif /* CYCFG_PERIPHERALS_H */ |
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