MbedCRC and CRC HAL revisions (6.0 redo) #11957
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This was referenced Nov 27, 2019
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@kjbracey-arm, thank you for your changes. |
0xc0170
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release-version: 6.0.0-alpha-1
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@kjbracey-arm Please rebase to resolve one conflict. Will start CI right after |
* Change "is supported" check to be a macro, so it can be done at compile-time. * Eliminate weird shift on 7-bit CRCs. * Add support for 32-bit CRCs and reversals to TMPM3HQ.
* Use compile-time detection of hardware CRC capability, so unneeded code and tables do not go into the image. * Add global JSON config option to allow choice between no tables, 16-entry tables or 256-entry tables for software CRC. Default set to 16-entry, reducing ROM size from previous 256-entry. * Allow manual override in template parameter to force software or bitwise CRC for a particular instance. * Micro-optimisations, particularly use of `RBIT` instruction and optimising bitwise computation using inline assembler. Incompatible changes: * Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard POLY_32BIT_ANSI, which now uses the same 16-entry tables by default, or can use hardware acceleration, which was disabled for POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can be used to force software like POLY_32BIT_REV_ANSI. * The precomputed table for POLY_16BIT_IBM had errors - this has been corrected, but software CRC results will be different from the previous software calculation. * < 8-bit CRC results are no longer are shifted up in the output value, but placed in the lowest bits, like other sizes. This means that code performing the SD command CRC will now need to use `(crc << 1) | 1`, rather than `crc | 1`.
* Make mbed_error use bitwise MbedCRC call rather than local implementation. * Remove use of POLY_32BIT_REV_ANSI from LittleFS. * Move some MbedCRC instances closer to use - construction cost is trivial, and visibility aids compiler optimisation.
When using MbedCRC, init value must be non-reversed, regardless of `reflect_data` or `reflect_out` settings. This means we need to reflect the intermediate output before passing using it as the next init value. (In GCC this ends up putting in two `RBIT` instructions back-to-back, because it's implemented as assembler, so it doesn't know how to optimise. In ARMC6, `__RBIT` is implemented as an intrinsic, so adding this reflection cancels the existing reflection and makes the code smaller).
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Rebased. |
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CI started |
Test run: SUCCESSSummary: 11 of 11 test jobs passed |
0xc0170
approved these changes
Dec 3, 2019
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Description
Summary of change
Re-submitting #11559 and #11896 for Mbed OS 6.0. Same 5 commits, cherry-picked.
Coupled changes to help speed and size optimisation, reduce special cases, and increase configurability.
Use compile-time detection of hardware CRC capability, so unneeded code and tables do not go into the image.
Add global JSON config option to allow choice between no tables, 16-entry tables or 256-entry tables for software CRC. Default set to 16-entry, reducing ROM size from previous 256-entry.
Allow manual override in template parameter to force software or bitwise CRC for a particular instance.
Micro-optimisations, particularly use of
RBITinstruction and optimising bitwise computation using inline assembler.Add support for 32-bit CRCs and reversals to TMPM3HQ target.
Incompatible changes as part of removing special cases:
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default, or can use hardware acceleration, which was disabled forPOLY_32BIT_REV_ANSI.MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE>can be used to force software like POLY_32BIT_REV_ANSI.POLY_16BIT_IBMhad errors - this has been corrected, but software CRC results will be different from the previous software calculation.(crc << 1) | 1, rather thancrc | 1.Documentation
n/a
Pull request type
Test results
Release Notes
Summary of changes
The
MbedCRCclass has been improved and optimised.Impact of changes
There is now a global JSON configuration
drivers.crc-table-sizecontrolling table usage, and individual uses can be size-optimised via template parameters. However some changes are backwards-incompatible:Migration actions required
POLY_32BIT_REV_ANSIhas been removed - the same result can be obtained viaPOLY_32BIT_ANSI.POLY_16BIT_IBMhad errors - this has been corrected, but CRC results will be different from the previous software calculation (but will match any hardware calculation)