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Dev stm32 F0 v1.7.0 #3567

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merged 4 commits into from
Jan 13, 2017
Merged

Dev stm32 F0 v1.7.0 #3567

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af6cdab
STM32Cube_FW_F0_V1.7.0
LMESTM Dec 22, 2016
0ca04ff
STM32: HAL update, use I2C function instead of MACRO
LMESTM Jan 3, 2017
cdcaf2a
STM32: Serial: Use up to date MACROs
LMESTM Jan 3, 2017
b15fc6a
STM32: TIM: Initialize new TIM parameter
LMESTM Jan 9, 2017
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4 changes: 2 additions & 2 deletions targets/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/device/stm32f051x8.h
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******************************************************************************
* @file stm32f051x8.h
* @author MCD Application Team
* @version V2.3.0
* @date 27-May-2016
* @version V2.3.1
* @date 04-November-2016
* @brief CMSIS Cortex-M0 Device Peripheral Access Layer Header File.
* This file contains all the peripheral register's definitions, bits
* definitions and memory mapping for STM32F0xx devices.
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8 changes: 4 additions & 4 deletions targets/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/device/stm32f0xx.h
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******************************************************************************
* @file stm32f0xx.h
* @author MCD Application Team
* @version V2.3.0
* @date 27-May-2016
* @version V2.3.1
* @date 04-November-2016
* @brief CMSIS STM32F0xx Device Peripheral Access Layer Header File.
*
* The file is the unique include file that the application programmer
Expand Down Expand Up @@ -112,11 +112,11 @@
#endif /* USE_HAL_DRIVER */

/**
* @brief CMSIS Device version number V2.3.0
* @brief CMSIS Device version number V2.3.1
*/
#define __STM32F0_DEVICE_VERSION_MAIN (0x02) /*!< [31:24] main version */
#define __STM32F0_DEVICE_VERSION_SUB1 (0x03) /*!< [23:16] sub1 version */
#define __STM32F0_DEVICE_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */
#define __STM32F0_DEVICE_VERSION_SUB2 (0x01) /*!< [15:8] sub2 version */
#define __STM32F0_DEVICE_VERSION_RC (0x00) /*!< [7:0] release candidate */
#define __STM32F0_DEVICE_VERSION ((__STM32F0_DEVICE_VERSION_MAIN << 24)\
|(__STM32F0_DEVICE_VERSION_SUB1 << 16)\
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4 changes: 2 additions & 2 deletions targets/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/device/system_stm32f0xx.c
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******************************************************************************
* @file system_stm32f0xx.c
* @author MCD Application Team
* @version V2.3.0
* @date 27-May-2016
* @version V2.3.1
* @date 04-November-2016
* @brief CMSIS Cortex-M0 Device Peripheral Access Layer System Source File.
*
* 1. This file provides two functions and one global variable to be called from
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4 changes: 2 additions & 2 deletions targets/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/device/system_stm32f0xx.h
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******************************************************************************
* @file system_stm32f0xx.h
* @author MCD Application Team
* @version V2.3.0
* @date 27-May-2016
* @version V2.3.1
* @date 04-November-2016
* @brief CMSIS Cortex-M0 Device System Source File for STM32F0xx devices.
******************************************************************************
* @attention
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4 changes: 2 additions & 2 deletions targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/device/stm32f030x8.h
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******************************************************************************
* @file stm32f030x8.h
* @author MCD Application Team
* @version V2.3.0
* @date 27-May-2016
* @version V2.3.1
* @date 04-November-2016
* @brief CMSIS Cortex-M0 Device Peripheral Access Layer Header File.
* This file contains all the peripheral register's definitions, bits
* definitions and memory mapping for STM32F0xx devices.
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8 changes: 4 additions & 4 deletions targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/device/stm32f0xx.h
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******************************************************************************
* @file stm32f0xx.h
* @author MCD Application Team
* @version V2.3.0
* @date 27-May-2016
* @version V2.3.1
* @date 04-November-2016
* @brief CMSIS STM32F0xx Device Peripheral Access Layer Header File.
*
* The file is the unique include file that the application programmer
Expand Down Expand Up @@ -112,11 +112,11 @@
#endif /* USE_HAL_DRIVER */

/**
* @brief CMSIS Device version number V2.3.0
* @brief CMSIS Device version number V2.3.1
*/
#define __STM32F0_DEVICE_VERSION_MAIN (0x02) /*!< [31:24] main version */
#define __STM32F0_DEVICE_VERSION_SUB1 (0x03) /*!< [23:16] sub1 version */
#define __STM32F0_DEVICE_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */
#define __STM32F0_DEVICE_VERSION_SUB2 (0x01) /*!< [15:8] sub2 version */
#define __STM32F0_DEVICE_VERSION_RC (0x00) /*!< [7:0] release candidate */
#define __STM32F0_DEVICE_VERSION ((__STM32F0_DEVICE_VERSION_MAIN << 24)\
|(__STM32F0_DEVICE_VERSION_SUB1 << 16)\
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4 changes: 2 additions & 2 deletions targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/device/system_stm32f0xx.c
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******************************************************************************
* @file system_stm32f0xx.c
* @author MCD Application Team
* @version V2.3.0
* @date 27-May-2016
* @version V2.3.1
* @date 04-November-2016
* @brief CMSIS Cortex-M0 Device Peripheral Access Layer System Source File.
*
* 1. This file provides two functions and one global variable to be called from
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4 changes: 2 additions & 2 deletions targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/device/system_stm32f0xx.h
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******************************************************************************
* @file system_stm32f0xx.h
* @author MCD Application Team
* @version V2.3.0
* @date 27-May-2016
* @version V2.3.1
* @date 04-November-2016
* @brief CMSIS Cortex-M0 Device System Source File for STM32F0xx devices.
******************************************************************************
* @attention
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4 changes: 2 additions & 2 deletions targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/device/stm32f031x6.h
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******************************************************************************
* @file stm32f031x6.h
* @author MCD Application Team
* @version V2.3.0
* @date 27-May-2016
* @version V2.3.1
* @date 04-November-2016
* @brief CMSIS Cortex-M0 Device Peripheral Access Layer Header File.
* This file contains all the peripheral register's definitions, bits
* definitions and memory mapping for STM32F0xx devices.
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8 changes: 4 additions & 4 deletions targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/device/stm32f0xx.h
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******************************************************************************
* @file stm32f0xx.h
* @author MCD Application Team
* @version V2.3.0
* @date 27-May-2016
* @version V2.3.1
* @date 04-November-2016
* @brief CMSIS STM32F0xx Device Peripheral Access Layer Header File.
*
* The file is the unique include file that the application programmer
Expand Down Expand Up @@ -112,11 +112,11 @@
#endif /* USE_HAL_DRIVER */

/**
* @brief CMSIS Device version number V2.3.0
* @brief CMSIS Device version number V2.3.1
*/
#define __STM32F0_DEVICE_VERSION_MAIN (0x02) /*!< [31:24] main version */
#define __STM32F0_DEVICE_VERSION_SUB1 (0x03) /*!< [23:16] sub1 version */
#define __STM32F0_DEVICE_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */
#define __STM32F0_DEVICE_VERSION_SUB2 (0x01) /*!< [15:8] sub2 version */
#define __STM32F0_DEVICE_VERSION_RC (0x00) /*!< [7:0] release candidate */
#define __STM32F0_DEVICE_VERSION ((__STM32F0_DEVICE_VERSION_MAIN << 24)\
|(__STM32F0_DEVICE_VERSION_SUB1 << 16)\
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4 changes: 2 additions & 2 deletions targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/device/system_stm32f0xx.c
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******************************************************************************
* @file system_stm32f0xx.c
* @author MCD Application Team
* @version V2.3.0
* @date 27-May-2016
* @version V2.3.1
* @date 04-November-2016
* @brief CMSIS Cortex-M0 Device Peripheral Access Layer System Source File.
*
* 1. This file provides two functions and one global variable to be called from
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4 changes: 2 additions & 2 deletions targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/device/system_stm32f0xx.h
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******************************************************************************
* @file system_stm32f0xx.h
* @author MCD Application Team
* @version V2.3.0
* @date 27-May-2016
* @version V2.3.1
* @date 04-November-2016
* @brief CMSIS Cortex-M0 Device System Source File for STM32F0xx devices.
******************************************************************************
* @attention
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4 changes: 2 additions & 2 deletions targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/device/stm32f042x6.h
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******************************************************************************
* @file stm32f042x6.h
* @author MCD Application Team
* @version V2.3.0
* @date 27-May-2016
* @version V2.3.1
* @date 04-November-2016
* @brief CMSIS Cortex-M0 Device Peripheral Access Layer Header File.
* This file contains all the peripheral register's definitions, bits
* definitions and memory mapping for STM32F0xx devices.
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8 changes: 4 additions & 4 deletions targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/device/stm32f0xx.h
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******************************************************************************
* @file stm32f0xx.h
* @author MCD Application Team
* @version V2.3.0
* @date 27-May-2016
* @version V2.3.1
* @date 04-November-2016
* @brief CMSIS STM32F0xx Device Peripheral Access Layer Header File.
*
* The file is the unique include file that the application programmer
Expand Down Expand Up @@ -112,11 +112,11 @@
#endif /* USE_HAL_DRIVER */

/**
* @brief CMSIS Device version number V2.3.0
* @brief CMSIS Device version number V2.3.1
*/
#define __STM32F0_DEVICE_VERSION_MAIN (0x02) /*!< [31:24] main version */
#define __STM32F0_DEVICE_VERSION_SUB1 (0x03) /*!< [23:16] sub1 version */
#define __STM32F0_DEVICE_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */
#define __STM32F0_DEVICE_VERSION_SUB2 (0x01) /*!< [15:8] sub2 version */
#define __STM32F0_DEVICE_VERSION_RC (0x00) /*!< [7:0] release candidate */
#define __STM32F0_DEVICE_VERSION ((__STM32F0_DEVICE_VERSION_MAIN << 24)\
|(__STM32F0_DEVICE_VERSION_SUB1 << 16)\
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4 changes: 2 additions & 2 deletions targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/device/system_stm32f0xx.c
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******************************************************************************
* @file system_stm32f0xx.c
* @author MCD Application Team
* @version V2.3.0
* @date 27-May-2016
* @version V2.3.1
* @date 04-November-2016
* @brief CMSIS Cortex-M0 Device Peripheral Access Layer System Source File.
*
* 1. This file provides two functions and one global variable to be called from
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4 changes: 2 additions & 2 deletions targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/device/system_stm32f0xx.h
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******************************************************************************
* @file system_stm32f0xx.h
* @author MCD Application Team
* @version V2.3.0
* @date 27-May-2016
* @version V2.3.1
* @date 04-November-2016
* @brief CMSIS Cortex-M0 Device System Source File for STM32F0xx devices.
******************************************************************************
* @attention
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4 changes: 2 additions & 2 deletions targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/stm32f070xb.h
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******************************************************************************
* @file stm32f070xb.h
* @author MCD Application Team
* @version V2.3.0
* @date 27-May-2016
* @version V2.3.1
* @date 04-November-2016
* @brief CMSIS Cortex-M0 Device Peripheral Access Layer Header File.
* This file contains all the peripheral register's definitions, bits
* definitions and memory mapping for STM32F0xx devices.
Expand Down
8 changes: 4 additions & 4 deletions targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/stm32f0xx.h
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******************************************************************************
* @file stm32f0xx.h
* @author MCD Application Team
* @version V2.3.0
* @date 27-May-2016
* @version V2.3.1
* @date 04-November-2016
* @brief CMSIS STM32F0xx Device Peripheral Access Layer Header File.
*
* The file is the unique include file that the application programmer
Expand Down Expand Up @@ -112,11 +112,11 @@
#endif /* USE_HAL_DRIVER */

/**
* @brief CMSIS Device version number V2.3.0
* @brief CMSIS Device version number V2.3.1
*/
#define __STM32F0_DEVICE_VERSION_MAIN (0x02) /*!< [31:24] main version */
#define __STM32F0_DEVICE_VERSION_SUB1 (0x03) /*!< [23:16] sub1 version */
#define __STM32F0_DEVICE_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */
#define __STM32F0_DEVICE_VERSION_SUB2 (0x01) /*!< [15:8] sub2 version */
#define __STM32F0_DEVICE_VERSION_RC (0x00) /*!< [7:0] release candidate */
#define __STM32F0_DEVICE_VERSION ((__STM32F0_DEVICE_VERSION_MAIN << 24)\
|(__STM32F0_DEVICE_VERSION_SUB1 << 16)\
Expand Down
4 changes: 2 additions & 2 deletions targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/system_stm32f0xx.c
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******************************************************************************
* @file system_stm32f0xx.c
* @author MCD Application Team
* @version V2.3.0
* @date 27-May-2016
* @version V2.3.1
* @date 04-November-2016
* @brief CMSIS Cortex-M0 Device Peripheral Access Layer System Source File.
*
* 1. This file provides two functions and one global variable to be called from
Expand Down
4 changes: 2 additions & 2 deletions targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/system_stm32f0xx.h
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******************************************************************************
* @file system_stm32f0xx.h
* @author MCD Application Team
* @version V2.3.0
* @date 27-May-2016
* @version V2.3.1
* @date 04-November-2016
* @brief CMSIS Cortex-M0 Device System Source File for STM32F0xx devices.
******************************************************************************
* @attention
Expand Down
4 changes: 2 additions & 2 deletions targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/stm32f072xb.h
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******************************************************************************
* @file stm32f072xb.h
* @author MCD Application Team
* @version V2.3.0
* @date 27-May-2016
* @version V2.3.1
* @date 04-November-2016
* @brief CMSIS Cortex-M0 Device Peripheral Access Layer Header File.
* This file contains all the peripheral register's definitions, bits
* definitions and memory mapping for STM32F0xx devices.
Expand Down
8 changes: 4 additions & 4 deletions targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/stm32f0xx.h
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******************************************************************************
* @file stm32f0xx.h
* @author MCD Application Team
* @version V2.3.0
* @date 27-May-2016
* @version V2.3.1
* @date 04-November-2016
* @brief CMSIS STM32F0xx Device Peripheral Access Layer Header File.
*
* The file is the unique include file that the application programmer
Expand Down Expand Up @@ -112,11 +112,11 @@
#endif /* USE_HAL_DRIVER */

/**
* @brief CMSIS Device version number V2.3.0
* @brief CMSIS Device version number V2.3.1
*/
#define __STM32F0_DEVICE_VERSION_MAIN (0x02) /*!< [31:24] main version */
#define __STM32F0_DEVICE_VERSION_SUB1 (0x03) /*!< [23:16] sub1 version */
#define __STM32F0_DEVICE_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */
#define __STM32F0_DEVICE_VERSION_SUB2 (0x01) /*!< [15:8] sub2 version */
#define __STM32F0_DEVICE_VERSION_RC (0x00) /*!< [7:0] release candidate */
#define __STM32F0_DEVICE_VERSION ((__STM32F0_DEVICE_VERSION_MAIN << 24)\
|(__STM32F0_DEVICE_VERSION_SUB1 << 16)\
Expand Down
4 changes: 2 additions & 2 deletions targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/system_stm32f0xx.c
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******************************************************************************
* @file system_stm32f0xx.c
* @author MCD Application Team
* @version V2.3.0
* @date 27-May-2016
* @version V2.3.1
* @date 04-November-2016
* @brief CMSIS Cortex-M0 Device Peripheral Access Layer System Source File.
*
* 1. This file provides two functions and one global variable to be called from
Expand Down
4 changes: 2 additions & 2 deletions targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/system_stm32f0xx.h
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******************************************************************************
* @file system_stm32f0xx.h
* @author MCD Application Team
* @version V2.3.0
* @date 27-May-2016
* @version V2.3.1
* @date 04-November-2016
* @brief CMSIS Cortex-M0 Device System Source File for STM32F0xx devices.
******************************************************************************
* @attention
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4 changes: 2 additions & 2 deletions targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/device/stm32f091xc.h
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******************************************************************************
* @file stm32f091xc.h
* @author MCD Application Team
* @version V2.3.0
* @date 27-May-2016
* @version V2.3.1
* @date 04-November-2016
* @brief CMSIS Cortex-M0 Device Peripheral Access Layer Header File.
* This file contains all the peripheral register's definitions, bits
* definitions and memory mapping for STM32F0xx devices.
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8 changes: 4 additions & 4 deletions targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/device/stm32f0xx.h
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******************************************************************************
* @file stm32f0xx.h
* @author MCD Application Team
* @version V2.3.0
* @date 27-May-2016
* @version V2.3.1
* @date 04-November-2016
* @brief CMSIS STM32F0xx Device Peripheral Access Layer Header File.
*
* The file is the unique include file that the application programmer
Expand Down Expand Up @@ -112,11 +112,11 @@
#endif /* USE_HAL_DRIVER */

/**
* @brief CMSIS Device version number V2.3.0
* @brief CMSIS Device version number V2.3.1
*/
#define __STM32F0_DEVICE_VERSION_MAIN (0x02) /*!< [31:24] main version */
#define __STM32F0_DEVICE_VERSION_SUB1 (0x03) /*!< [23:16] sub1 version */
#define __STM32F0_DEVICE_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */
#define __STM32F0_DEVICE_VERSION_SUB2 (0x01) /*!< [15:8] sub2 version */
#define __STM32F0_DEVICE_VERSION_RC (0x00) /*!< [7:0] release candidate */
#define __STM32F0_DEVICE_VERSION ((__STM32F0_DEVICE_VERSION_MAIN << 24)\
|(__STM32F0_DEVICE_VERSION_SUB1 << 16)\
Expand Down
4 changes: 2 additions & 2 deletions targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/device/system_stm32f0xx.c
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******************************************************************************
* @file system_stm32f0xx.c
* @author MCD Application Team
* @version V2.3.0
* @date 27-May-2016
* @version V2.3.1
* @date 04-November-2016
* @brief CMSIS Cortex-M0 Device Peripheral Access Layer System Source File.
*
* 1. This file provides two functions and one global variable to be called from
Expand Down
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