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Release candidate for mbed-os-5.7.4 (take three) #5954

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merged 133 commits into from Jan 30, 2018
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@cmonr cmonr commented Jan 27, 2018

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Marcus Chang and others added 28 commits January 27, 2018 00:57
The current 0.1% clock tolerance is too small for certain platforms
which natural variance is larger than this. This commit increases the
tolerance to 0.5% instead.

Sample output from time_cpu_cycles called repeatedly in init,
before running any flash tests:

[1515706585.63][CONN][RXD] diff: 49316
[1515706585.69][CONN][RXD] diff: 49256
[1515706585.75][CONN][RXD] diff: 49286
[1515706585.81][CONN][RXD] diff: 49256
[1515706585.87][CONN][RXD] diff: 49225
[1515706585.94][CONN][RXD] diff: 49286
[1515706585.99][CONN][RXD] diff: 49317
[1515706586.06][CONN][RXD] diff: 49255
[1515706586.12][CONN][RXD] diff: 49286
[1515706586.18][CONN][RXD] diff: 49285
[1515706586.24][CONN][RXD] diff: 49286
[1515706586.31][CONN][RXD] diff: 49347
[1515706586.36][CONN][RXD] diff: 49347
[1515706586.43][CONN][RXD] diff: 49286
[1515706586.49][CONN][RXD] diff: 49286
[1515706586.55][CONN][RXD] diff: 49256
[1515706586.61][CONN][RXD] diff: 49286
[1515706586.68][CONN][RXD] diff: 49346
[1515706586.74][CONN][RXD] diff: 49347
[1515706586.80][CONN][RXD] diff: 49256

Notice the outliers will cause intermittent CI failures.
FATFilesystem declares sector count and size as uint32_t and block
device class arguments are addr and size which is uint64_t
While passing arguments to program/read/write API's of block device,
multiplication of uint32_t*uint32_t was not typecasted properly to
uint64_t which resulted in MSB truncation.

Eg. If block 0x800000 is accessed with block size 0x200, addr to be
passed (0x800000*0x200)0x100000000, but actual address passed was 0x0
which resulted in over-writting the root directory, and hence corrupted
filesystem
- clock source is now a user choice
- IAR tool chain is available
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STM32L0, L4, F7 and few F4 chip are supporting LPTIM feature.
We propose to allow user to use LPTIM for MBED LowPowerTimer API instead of using RTC wakeup timers.

By default, all targets that are supporting this feature have been configured.
All documentation is now in Handbook
The C++ "operator new" and "operator delete" (and their array
variants) were logging the the caller address wrong. In practice
if one used "operator new", the logged caller address pointed
to mbed_retarget.cpp, not to the client. Fix this by exposing
the alloc wrappers to the the retarget.

Note: this fixes only the ARMCC variants, as the GCC ones have
different different API and implementation.
Fix the caller address logging on the GCC compilation too.
Previously the code logged the caller address as C++ wrapper,
not the actual caller of the C++ operator new or delete.
Allow custom targets to override the DCDC settings by defining EMU_DCDCINIT_STK_DEFAULT to target-specific initialization values.
deepikabhavnani did the hard work in tracking this issue down.  Block
addresses are not cast to the correct type until after multiplying to
convert to byte addresses. This results in an overflow when the storage
is larger than 4 GB.
This commit fixes #5840. Fix verified by running mbed_hal-lp_ticker test suite with preloaded RTC counter such that it wrapped in the middle of the suite.
Also removes explicit sleep blocking from the us_ticker implementation, since sleep blocking for us tickers is done at mbed HAL level now. This was causing one of the lp_ticker tests to fail.
- STDIO_UART define is no more used
- configuring a new serial with the same UART as STDIO is no more allowed
bcostm and others added 15 commits January 27, 2018 01:37
restructure target files to better sync with Ameba sdk base
In the below "features/FEATURE_LWIP" folders, same as Cortex-M targets, I changed the folder structure to combine files that can be shared as RZ/A1 related. And I renamed the folder name to "TARGET_RZ_A1XX" in order to make commonality explicit.
- "features/FEATURE_LWIP" folder
  <before>
  \features\FEATURE_LWIP\lwip-interface\lwip-eth\arch\TARGET_RZ_A1H
  \features\FEATURE_LWIP\lwip-interface\lwip-eth\arch\TARGET_VK_RZ_A1H
  <after>
  \features\FEATURE_LWIP\lwip-interface\lwip-eth\arch\TARGET_RZ_A1XX
In "targets/TARGET_RENESAS" folders, same as Cortex-M targets, I changed the folder structure to combine files that can be shared as RZ/A1 related.
 And I renamed the folder name to "TARGET_RZ_A1XX" in order to make commonality explicit.
- "targets/TARGET_RENESAS" folder
  <before>
  \targets\TARGET_RENESAS\TARGET_RZ_A1H
  \targets\TARGET_RENESAS\TARGET_VK_RZ_A1H
  <after>
  \targets\TARGET_RENESAS\TARGET_RZ_A1XX
…ctory

I made be available in common whatever the board related to RZ_A1 in the below files.
- Since there are the table code of Pinmap differs for each board, I moved the code to "PeripheralPins" file for each board, and changed to include PeripheralPins.h.
  analogin_api.c, can_api.c, gpio_irq_api.c, i2c_api.c, pinmap.c, port_api.c, pwmout_api.c, serial_api.c, spi_api.c and us_ticker.c

- Since there are some board-specific processes, I enclosed the processes with "#ifdef" and rearranged the functions to make be easier to enclose.
  can_api.c, ethernet_api.c and serial_api.c

- Since there are the driver configuration values differs for each board, I added "mbed_drv_cfg.h" file for each board and defined macros for the values, and changed to refer to the macros.
  can_api.c, gpio_api.c, pwmout_api.c and rtc_api.c
As a result of revision of folder structure, I changed the values of "extra_labels" of RZ_A1-related in targets.json.
For LWIP communication speedup in RZ_A1 related, I changed the below macro value and added the definition processing in RZ/A1 related header file(lwipopts_conf.h). For this reason, those macros are overrode by RZ/A1 related values, not default values.
I modified the debug message when using LWIP in RZ/A1 related mbed boards.
In eth_arch_enetif_init(), sys_thread_new() was called and task name is appeared as debug information, but task name for debug was a mistake.
I added the function declarations of Ethernet functions that have a WEAK attribute. Although several Ethernet functions was called in rza1_emac.c, GR-LYCHEE don't have Ethernert feature. But there may be case that GR-LYCHEE uses LWIP feature.
In this case, since GR-LYCHEE will occur the build error, I addressed the error by defining the functions with a WEAK attribute. For reason of WEAK attribute, there is no influence in GR-PEACH and VK_RZ_A1H that have Ethernet feature.
I modified the lack of copyright in the below header files that I added for commonizing the RZ_A1 related files.
- targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/mbed_drv_cfg.h
- targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_VK_RZ_A1H/mbed_drv_cfg.h
I added the "RZ_A1XX" label for commonizing the setting in targets.json, and inherited in both RZ_A1H and VK_RZ_A1H.
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cmonr commented Jan 27, 2018

/morph build
/morph mbed2-release

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mbed-ci commented Jan 27, 2018

Build : SUCCESS

Build number : 984
Build artifacts/logs : http://mbed-os.s3-website-eu-west-1.amazonaws.com/?prefix=builds/5954/

Triggering tests

/morph test
/morph uvisor-test
/morph export-build

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mbed-ci commented Jan 27, 2018

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mbed-ci commented Jan 27, 2018

@0xc0170
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0xc0170 commented Jan 29, 2018

/morph mbed2-release

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Result: FAILURE

Your command has finished executing! Here's what you wrote!

/morph mbed2-release

@0xc0170
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0xc0170 commented Jan 29, 2018

/morph mbed2-release

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Result: FAILURE

Your command has finished executing! Here's what you wrote!

/morph mbed2-release

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0xc0170 commented Jan 29, 2018

+1

@studavekar
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/morph mbed2-release

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Result: SUCCESS

Your command has finished executing! Here's what you wrote!

/morph mbed2-release

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