STM32L476/486: Improve SRAM usage for IAR

[bcostm]

Description

• These devices have 2 SRAM areas
• Before this PR only SRAM1 was used for Stack and Heap
• Now both SRAM are used: Stack placed in SRAM2 and Heap in SRAM1
• Continuation of PR ST-DISCO_L475VG_IOT01A: Improve SRAM use for IAR toolchain #5844 done for STM32L475 device

Status

READY

Tested OK on NUCLEO_L476RG

Migrations

NO

Fixes #5859.

[cmonr]

@adustm Mind taking a look? Lookd pretty straightforward.

/morph build

[mbed-ci]

Build : SUCCESS

Build number : 1054
Build artifacts/logs : http://mbed-os.s3-website-eu-west-1.amazonaws.com/?prefix=builds/6004/

Triggering tests

/morph test
/morph uvisor-test
/morph export-build

[mbed-ci]

Test : SUCCESS

Build number : 860
Test logs :http://mbed-os-logs.s3-website-us-west-1.amazonaws.com/?prefix=logs/6004/860

[mbed-ci]

Exporter Build : SUCCESS

Build number : 733
Build artifacts/logs : http://mbed-os.s3-website-eu-west-1.amazonaws.com/?prefix=builds/exporter/6004/

[adustm]

LGTM. Thanks Bruno for this PR

[betzw]

Do you plan something similar also for the other toolsets?

[bcostm]

Yes it was planned but without success for the moment neither with ARM nor GCC compiler. We have an error during code execution and don't know how to solve it. Any help welcome !