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RTX: Support stacks larger than 64k #826

Merged
merged 1 commit into from
Jan 5, 2015
Merged

RTX: Support stacks larger than 64k #826

merged 1 commit into from
Jan 5, 2015

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adamgreen
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This issue was originally reported on the mbed site:
http://developer.mbed.org/questions/5570/mbed-rtos-memory-utilization/

The cause of the 64k limitation is that even though the user can set a
stack size larger than 64k in the osThreadDef_t::stacksize 32-bit
field, this size is truncated to 16-bit when it is copied to
the priv_stack field in the OS_TCB structure.

This commit corrects that problem by making the OS_TCB::priv_stack
field 32-bit. Due to word alignment, this introduces another 2 bytes
of padding in the structure which I have made explicit with the
addition of the reserved2 field.

The tsk_stack field which follows priv_stack is referenced directly by
assembly language code responsible for context switching. This context
switching code used a fixed byte offset, TCB_TSTACK, to access this
tsk_stack field. I had to update the TCB_TSTACK definition in various
locations from 36 to 40 to account for the extra alignment padding and
increased size of the priv_stack field.

TESTING

  • GCC_ARM - mbedLPC1768 and mbedLPC11U24
  • Online mbed Compiler - mbedLPC1768 and mbedLPC11U24

NOTES: I had to change assembly language code that was specific to IAR
but I don't have that toolchain so those changes aren't tested.
They do however follow the same pattern as the tested GCC
modifications.

I also didn't touch the Cortex-A version of RTX since I don't have such hardware to perform any testing.

This issue was originally reported on the mbed site:
 http://developer.mbed.org/questions/5570/mbed-rtos-memory-utilization/

The cause of the 64k limitation is that even though the user can set a
stack size larger than 64k in the osThreadDef_t::stacksize 32-bit
field, this size is truncated to 16-bit when it is copied to
the priv_stack field in the OS_TCB structure.

This commit corrects that problem by making the OS_TCB::priv_stack
field 32-bit.  Due to word alignment, this introduces another 2 bytes
of padding in the structure which I have made explicit with the
addition of the reserved2 field.

The tsk_stack field which follows priv_stack is referenced directly by
assembly language code responsible for context switching.  This context
switching code used a fixed byte offset, TCB_TSTACK, to access this
tsk_stack field.  I had to update the TCB_TSTACK definition in various
locations from 36 to 40 to account for the extra alignment padding and
increased size of the priv_stack field.

TESTING
* GCC_ARM - mbedLPC1768 and mbedLPC11U24
* Online mbed Compiler - mbedLPC1768 and mbedLPC11U24

NOTES: I had to change assembly language code that was specific to IAR
       but I don't have that toolchain so those changes aren't tested.
       They do however follow the same pattern as the tested GCC
       modifications.
@0xc0170
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0xc0170 commented Jan 5, 2015

Thanks for detailed description.

@masaohamanaka, please look at this PR. I believe there is the same problem (P_TCB declaration contain priv_stack as U16)

0xc0170 added a commit that referenced this pull request Jan 5, 2015
@0xc0170 0xc0170 merged commit 5748a9d into ARMmbed:master Jan 5, 2015
@adamgreen adamgreen deleted the rtxSupportStacksLargerThan64k branch January 5, 2015 11:10
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2 participants