MPU API (Reopened) #8871
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MPU API (Reopened) #8871
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CI started. Will clear out stale statuses in a bit. |
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Oddly incorrect status checks bypassed. |
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Build failures:
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I'll fetch this PR and try to fix it now |
Add a minimalistic HAL MPU API with the ability to prevent execution in ram.
Test that the MPU correctly stops execution of memory in the stack region, heap region, data region and bss region. Also check that the MPU can be enabled, disabled and freed.
Enable the MPU as part of the boot sequence and disable it before starting a new application. Also add reference counted MPU lock and unlock functions to allow code to execute from ram when necessary.
Add the class MpuXnLock which uses RAII to allow execution from RAM in a block of code.
Add a design document which covers the proposed implementation of execute never.
When programming flash using the FlashIAP API allow execution from ram. Many devices require flashing to be done from RAM. Also allow execution from ram when running the low level flash tests.
Create a dedicated MPU directory for standard Arm MPU implementations in preparation for the Arm v8m MPU. Replace MBED_MPU_ENABLED with DEVICE_MPU to align with the porting layer of other HAL APIs.
Add MPU for devices which support the API in targets.json.
Add a driver for the v8m MPU.
Add a formal HAL specification consisting of: -defined and undefined behavior -test descriptions -enable doxygen for MPU
Rename MpuXnLock to ScopedMpuXnLock so it has the same naming convention as ScopedMutexLock. Also make this class inherit from NonCopyable to prevent misuse.
Make the following changes:
-Allow a vector specific ARM MPU driver by defining MBED_MPU_CUSTOM
-Allow ROM address to be configured for ARMv7-M devices by
setting the define MBED_MPU_ROM_END
-Add ROM write protection
-Add new functions and lock
-enable at boot
-disable during flash programming
Change ARMvXm to ARMvX-M in the design doc.
Ensure that code written to ram is flushed and that caches are cleared before attempting to executing from ram. This fixes CI failures on the MPU test when it is built for Cotex-M7 devices such as the NUCLEO-F746ZG.
Change the variable names in FlashIAP from 'xn' to 'make_ram_executable' and from 'wn' to 'make_rom_writable' to make the code more readable.
Hook both the HardFault and the MemManage IRQs since it is up to the target to determine which fault is enabled.
For enhanced security ARMv8-M firmware doesn't allow the hardfault handler to be hooked by non-secure code. Because of this there is no way to recover from the MPU fault tests. This PR disables those tests until hardfault recovery is supported by secure firmware.
Invert the name of the lock functions and classes so you are not locking a negative.
Remove the design document since it is out of date and up to date content is in the final docs.
Set a default value for MPU_ROM_END in target so this is defined for all targets.
Run astyle to fix CI failures.
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Rebased + address the build failures (new target support) Restarting CI now |
They should support MPU as they have all defined. Otherwise it fails to build
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Two more targets needed fixing, did not spot them in the previous failures, restarting CI |
Test run: SUCCESSSummary: 4 of 4 test jobs passed |
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Restarting export CI |
0xc0170
approved these changes
Nov 28, 2018
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Description
This PR is #8335, but reopened.
For some reason Travis CI tried to build the
mpubranch in ARMmbed, which doesn't exist...Pull request type