Add eth1 device node

Aaron-xx · Apr 28, 2024 · 910b7cb · 910b7cb
1 parent c447616
commit 910b7cb
Showing 1 changed file with 59 additions and 2 deletions.
diff --git a/arch/arm/boot/dts/stm32mp135d-aaron.dts b/arch/arm/boot/dts/stm32mp135d-aaron.dts
@@ -22,6 +22,7 @@
 	compatible = "st,stm32mp135d-aaron", "st,stm32mp135";
 
 	aliases {
+		ethernet0 = &eth1;
 		serial0 = &uart4;
 	};
 
@@ -129,9 +130,27 @@
 	status = "okay";
 };
 
-&iwdg2 {
-	timeout-sec = <32>;
+&eth1 {
 	status = "okay";
+	pinctrl-0 = <&eth1_pins_a>;
+	pinctrl-1 = <&eth1_sleep_pins_a>;
+	pinctrl-names = "default", "sleep";
+	phy-mode = "rmii";
+	max-speed = <100>;
+	phy-handle = <&phy0_eth1>;
+	nvmem-cells = <&ethernet_mac1_address>;
+	nvmem-cell-names = "mac-address";
+
+	mdio1 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "snps,dwmac-mdio";
+		phy0_eth1: ethernet-phy@1 {
+			compatible = "ethernet-phy-ieee802.3-c22";
+			reset-gpios =  <&gpioa 6 GPIO_ACTIVE_LOW>;
+			reg = <1>;
+		};
+	};
 };
 
 &sdmmc1 {
@@ -212,6 +231,44 @@
 };
 
 &pinctrl {
+	eth1_pins_a: eth1-0 {
+		pins1 {
+			pinmux = <STM32_PINMUX('A', 1, AF11)>, /* ETH1_REF_CLK */
+					 <STM32_PINMUX('B', 11, AF11)>, /* ETH1_TX_EN */
+					 <STM32_PINMUX('G', 2, AF11)>, /* ETH1_MDC */
+					 <STM32_PINMUX('G', 13, AF11)>, /* ETH1_TXD0 */
+					 <STM32_PINMUX('G', 14, AF11)>; /* ETH1_TXD1 */
+			bias-disable;
+			drive-push-pull;
+			slew-rate = <1>;
+		};
+		pins2 {
+			pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH1_MDIO */
+			bias-disable;
+			drive-push-pull;
+			slew-rate = <0>;
+		};
+		pins3 {
+			pinmux = <STM32_PINMUX('A', 7, AF11)>, /* ETH1_CRS_DV */
+					 <STM32_PINMUX('C', 4, AF11)>, /* ETH1_RXD0 */
+					 <STM32_PINMUX('C', 5, AF11)>; /* ETH1_RXD1 */
+			bias-disable;
+		};
+	};
+
+	eth1_sleep_pins_a: eth1_sleep-0 {
+		pins {
+			pinmux = <STM32_PINMUX('A', 1, ANALOG)>, /* ETH1_REF_CLK */
+					 <STM32_PINMUX('A', 2, ANALOG)>, /* ETH1_MDIO */
+					 <STM32_PINMUX('A', 7, ANALOG)>, /* ETH1_CRS_DV */
+					 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_TX_EN */
+					 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH1_RXD0 */
+					 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH1_RXD1 */
+					 <STM32_PINMUX('G', 2, ANALOG)>, /* ETH1_MDC */
+					 <STM32_PINMUX('G', 13, ANALOG)>, /* ETH1_TXD0 */
+					 <STM32_PINMUX('G', 14, ANALOG)>; /* ETH1_TXD1 */
+		};
+	};
 	sdmmc1_pins_a: sdmmc1-0 {
 		pins1 {
 			pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */